ee0861ae7a
Nxstyle error fixes to pass CI Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
95 lines
3.6 KiB
C
95 lines
3.6 KiB
C
/****************************************************************************
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* arch/arm/src/stm32f0l0g0/stm32_hsi48.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_STM32F0L0G0_STM32_HSI48_H
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#define __ARCH_ARM_SRC_STM32F0L0G0_STM32_HSI48_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#ifdef CONFIG_STM32F0L0G0_HAVE_HSI48
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/****************************************************************************
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* Public Types
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****************************************************************************/
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enum syncsrc_e
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{
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SYNCSRC_NONE = 0, /* No SYNC signal */
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SYNCSRC_GPIO, /* GPIO selected as SYNC signal source */
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SYNCSRC_LSE, /* LSE selected as SYNC signal source */
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SYNCSRC_USB, /* USB SOF selected as SYNC signal source */
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};
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/****************************************************************************
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* Public Functions Prototypes
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****************************************************************************/
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/****************************************************************************
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* Name: stm32_enable_hsi48
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*
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* Description:
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* On STM32F04x, STM32F07x and STM32F09x devices only, the HSI48 clock
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* signal is generated from an internal 48 MHz RC oscillator and can be
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* used directly as a system clock or divided and be used as PLL input.
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*
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* The internal 48MHz RC oscillator is mainly dedicated to provide a high
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* precision clock to the USB peripheral by means of a special Clock
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* Recovery System (CRS) circuitry, which could use the USB SOF signal or
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* the LSE or an external signal to automatically adjust the oscillator
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* frequency on-fly, in a very small steps. This oscillator can also be
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* used as a system clock source when the system is in run mode; it will
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* be disabled as soon as the system enters in Stop or Standby mode. When
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* the CRS is not used, the HSI48 RC oscillator runs on its default
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* frequency which is subject to manufacturing process variations.
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*
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* Input Parameters:
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* Identifies the syncrhonization source for the HSI48. When used as the
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* USB source clock, this must be set to SYNCSRC_USB.
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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void stm32_enable_hsi48(enum syncsrc_e syncsrc);
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/****************************************************************************
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* Name: stm32_disable_hsi48
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*
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* Description:
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* Disable the HSI48 clock.
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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void stm32_disable_hsi48(void);
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#endif /* CONFIG_STM32F0L0G0_HAVE_HSI48 */
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#endif /* __ARCH_ARM_SRC_STM32F0L0G0_STM32_HSI48_H */
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