102 lines
4.0 KiB
C
102 lines
4.0 KiB
C
/****************************************************************************
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* arch/arm/src/sama5/sam_memorymap.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_SAMA5_SAM_MEMORYMAP_H
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#define __ARCH_ARM_SRC_SAMA5_SAM_MEMORYMAP_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <arch/sama5/chip.h>
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#include "mmu.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* The vectors are, by default, positioned at the beginning of the text
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* section. Under what conditions do we have to remap these vectors?
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*
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* 1) If we are using high vectors (CONFIG_ARCH_LOWVECTORS=n). In this case,
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* the vectors will lie at virtual address 0xffff:000 and we will need
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* to a) copy the vectors to another location, and b) map the vectors
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* to that address, and
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*
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* For the case of CONFIG_ARCH_LOWVECTORS=y, defined. The SAMA5 boot-up
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* logic will map the beginning of the boot memory to address 0x0000:0000
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* using both the MMU and the AXI matrix REMAP register. No vector copy
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* is required because the vectors are position at the beginning of the
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* boot memory at link time and no additional MMU mapping required.
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*
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* 2) We are not using a ROM page table. We cannot set any custom mappings
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* in the case and the build must conform to the ROM page table properties
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*/
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#if !defined(CONFIG_ARCH_LOWVECTORS) && defined(CONFIG_ARCH_ROMPGTABLE)
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# error High vector remap cannot be performed if we are using a ROM page table
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#endif
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/* If SDRAM needs to be configured, then it will be configured twice: It
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* will first be configured to a temporary state to support low-level
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* initialization. After the SDRAM has been fully initialized, SRAM be used
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* to set the SDRM in its final, fully cache-able state.
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*/
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#undef NEED_SDRAM_CONFIGURATION
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#if defined(CONFIG_SAMA5_DDRCS) && !defined(CONFIG_SAMA5_BOOT_SDRAM)
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# define NEED_SDRAM_CONFIGURATION 1
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#endif
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#undef NEED_SDRAM_MAPPING
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#undef NEED_SDRAM_REMAPPING
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#if defined(NEED_SDRAM_CONFIGURATION) && !defined(CONFIG_ARCH_ROMPGTABLE)
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# define NEED_SDRAM_MAPPING 1
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# define NEED_SDRAM_REMAPPING 1
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#endif
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/* This table describes how to map a set of 1Mb pages to space the physical
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* address space of the SAMA5.
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*/
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#ifndef CONFIG_ARCH_ROMPGTABLE
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extern const struct section_mapping_s g_section_mapping[];
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extern const size_t g_num_mappings;
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#endif
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/* SAMA5 External SDRAM Memory. Final configuration. The SDRAM was
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* configured in a temporary state to support low-level ininitialization.
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* After the SDRAM has been fully initialized, this structure is used to
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* set the SDRM in its final, fully cache-able state.
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*/
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#ifdef NEED_SDRAM_REMAPPING
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extern const struct section_mapping_s g_operational_mapping[];
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extern const size_t g_num_opmappings;
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#endif
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#endif /* __ARCH_ARM_SRC_SAMA5_SAM_MEMORYMAP_H */
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