242 lines
10 KiB
C
242 lines
10 KiB
C
/************************************************************************************
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* configs/stm32f0discovery/include/board.h
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*
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* Copyright (C) 2017 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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* Alan Carvalho de Assis <acassis@gmail.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __CONFIG_STM32F0DISCOVERY_INCLUDE_BOARD_H
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#define __CONFIG_STM32F0DISCOVERY_INCLUDE_BOARD_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#ifndef __ASSEMBLY__
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# include <stdint.h>
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#endif
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Clocking *************************************************************************/
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/* Four different clock sources can be used to drive the system clock (SYSCLK):
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*
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* - HSI high-speed internal oscillator clock
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* Generated from an internal 16 MHz RC oscillator
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* - HSE high-speed external oscillator clock
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* Normally driven by an external crystal (X3). However, this crystal is not fitted
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* on the STM32L-Discovery board.
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* - PLL clock
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* - MSI multispeed internal oscillator clock
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* The MSI clock signal is generated from an internal RC oscillator. Seven frequency
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* ranges are available: 65.536 kHz, 131.072 kHz, 262.144 kHz, 524.288 kHz, 1.048 MHz,
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* 2.097 MHz (default value) and 4.194 MHz.
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*
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* The devices have the following two secondary clock sources
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* - LSI low-speed internal RC clock
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* Drives the watchdog and RTC. Approximately 37KHz
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* - LSE low-speed external oscillator clock
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* Driven by 32.768KHz crystal (X2) on the OSC32_IN and OSC32_OUT pins.
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*/
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#define STM32F0_BOARD_XTAL 8000000ul /* X3 on board (not fitted)*/
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#define STM32F0_HSI_FREQUENCY 16000000ul /* Approximately 16MHz */
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#define STM32F0_HSE_FREQUENCY STM32F0_BOARD_XTAL
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#define STM32F0_MSI_FREQUENCY 2097000 /* Default is approximately 2.097Mhz */
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#define STM32F0_LSI_FREQUENCY 37000 /* Approximately 37KHz */
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#define STM32F0_LSE_FREQUENCY 32768 /* X2 on board */
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/* This is the clock setup we configure for:
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*
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* SYSCLK = BOARD_OSCCLK_FREQUENCY = 12MHz -> Select Main oscillator for source
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* PLL0CLK = (2 * 20 * SYSCLK) / 1 = 480MHz -> PLL0 multipler=20, pre-divider=1
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* MCLK = 480MHz / 6 = 80MHz -> MCLK divider = 6
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*/
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#define STM32F0_MCLK 48000000 /* 48Mhz */
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/* PLL Configuration
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*
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* - PLL source is HSI -> 16MHz input (nominal)
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* - PLL multipler is 6 -> 96MHz PLL VCO clock output (for USB)
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* - PLL output divider 3 -> 32MHz divided down PLL VCO clock output
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*
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* Resulting SYSCLK frequency is 16MHz x 6 / 3 = 32MHz
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*
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* USB/SDIO:
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* If the USB or SDIO interface is used in the application, the PLL VCO
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* clock (defined by STM32F0_CFGR_PLLMUL) must be programmed to output a 96
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* MHz frequency. This is required to provide a 48 MHz clock to the USB or
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* SDIO (SDIOCLK or USBCLK = PLLVCO/2).
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* SYSCLK
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* The system clock is derived from the PLL VCO divided by the output division factor.
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* Limitations:
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* 96 MHz as PLLVCO when the product is in range 1 (1.8V),
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* 48 MHz as PLLVCO when the product is in range 2 (1.5V),
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* 24 MHz when the product is in range 3 (1.2V).
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* Output division to avoid exceeding 32 MHz as SYSCLK.
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* The minimum input clock frequency for PLL is 2 MHz (when using HSE as PLL source).
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*/
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#define STM32F0_CFGR_PLLSRC 0 /* Source is 16MHz HSI */
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#ifdef CONFIG_STM32F0_USB
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# define STM32F0_CFGR_PLLMUL RCC_CFGR_PLLMUL_CLKx6 /* PLLMUL = 6 */
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# define STM32F0_CFGR_PLLDIV RCC_CFGR_PLLDIV_3 /* PLLDIV = 3 */
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# define STM32F0_PLL_FREQUENCY (6*STM32F0_HSI_FREQUENCY) /* PLL VCO Frequency is 96MHz */
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#else
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# define STM32F0_CFGR_PLLMUL RCC_CFGR_PLLMUL_CLKx4 /* PLLMUL = 4 */
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# define STM32F0_CFGR_PLLDIV RCC_CFGR_PLLDIV_2 /* PLLDIV = 2 */
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# define STM32F0_PLL_FREQUENCY (4*STM32F0_HSI_FREQUENCY) /* PLL VCO Frequency is 64MHz */
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#endif
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/* Use the PLL and set the SYSCLK source to be the divided down PLL VCO output
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* frequency (STM32F0_PLL_FREQUENCY divided by the PLLDIV value).
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*/
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#define STM32F0_SYSCLK_SW RCC_CFGR_SW_PLL /* Use the PLL as the SYSCLK */
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#define STM32F0_SYSCLK_SWS RCC_CFGR_SWS_PLL
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#ifdef CONFIG_STM32F0_USB
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# define STM32F0_SYSCLK_FREQUENCY (STM32F0_PLL_FREQUENCY/3) /* SYSCLK frequence is 96MHz/PLLDIV = 32MHz */
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#else
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# define STM32F0_SYSCLK_FREQUENCY (STM32F0_PLL_FREQUENCY/2) /* SYSCLK frequence is 64MHz/PLLDIV = 32MHz */
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#endif
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/* AHB clock (HCLK) is SYSCLK (32MHz) */
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#define STM32F0_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK
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#define STM32F0_HCLK_FREQUENCY STM32F0_SYSCLK_FREQUENCY
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#define STM32F0_BOARD_HCLK STM32F0_HCLK_FREQUENCY /* Same as above, to satisfy compiler */
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/* APB2 clock (PCLK2) is HCLK (32MHz) */
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#define STM32F0_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK
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#define STM32F0_PCLK2_FREQUENCY STM32F0_HCLK_FREQUENCY
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#define STM32F0_APB2_CLKIN (STM32F0_PCLK2_FREQUENCY)
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/* APB2 timers 9, 10, and 11 will receive PCLK2. */
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#define STM32F0_APB2_TIM9_CLKIN (STM32F0_PCLK2_FREQUENCY)
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#define STM32F0_APB2_TIM10_CLKIN (STM32F0_PCLK2_FREQUENCY)
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#define STM32F0_APB2_TIM11_CLKIN (STM32F0_PCLK2_FREQUENCY)
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/* APB1 clock (PCLK1) is HCLK (32MHz) */
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#define STM32F0_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLK
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#define STM32F0_PCLK1_FREQUENCY (STM32F0_HCLK_FREQUENCY)
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/* APB1 timers 2-7 will receive PCLK1 */
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#define STM32F0_APB1_TIM2_CLKIN (STM32F0_PCLK1_FREQUENCY)
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#define STM32F0_APB1_TIM3_CLKIN (STM32F0_PCLK1_FREQUENCY)
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#define STM32F0_APB1_TIM4_CLKIN (STM32F0_PCLK1_FREQUENCY)
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#define STM32F0_APB1_TIM5_CLKIN (STM32F0_PCLK1_FREQUENCY)
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#define STM32F0_APB1_TIM6_CLKIN (STM32F0_PCLK1_FREQUENCY)
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#define STM32F0_APB1_TIM7_CLKIN (STM32F0_PCLK1_FREQUENCY)
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/* LED definitions ******************************************************************/
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/* The STM32L-Discovery board has four LEDs. Two of these are controlled by
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* logic on the board and are not available for software control:
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*
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* LD1 COM: LD2 default status is red. LD2 turns to green to indicate that
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* communications are in progress between the PC and the ST-LINK/V2.
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* LD2 PWR: Red LED indicates that the board is powered.
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*
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* And two LEDs can be controlled by software:
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*
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* User LD3: Green LED is a user LED connected to the I/O PB7 of the STM32L152
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* MCU.
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* User LD4: Blue LED is a user LED connected to the I/O PB6 of the STM32L152
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* MCU.
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*
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* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any
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* way. The following definitions are used to access individual LEDs.
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*/
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/* LED index values for use with board_userled() */
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#define BOARD_LED1 0 /* User LD3 */
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#define BOARD_LED2 1 /* User LD4 */
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#define BOARD_NLEDS 2
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/* LED bits for use with board_userled_all() */
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#define BOARD_LED1_BIT (1 << BOARD_LED1)
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#define BOARD_LED2_BIT (1 << BOARD_LED2)
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/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 8 LEDs on board the
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* STM32L-Discovery. The following definitions describe how NuttX controls the LEDs:
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*
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* SYMBOL Meaning LED state
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* LED1 LED2
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* ------------------- ----------------------- -------- --------
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* LED_STARTED NuttX has been started OFF OFF
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* LED_HEAPALLOCATE Heap has been allocated OFF OFF
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* LED_IRQSENABLED Interrupts enabled OFF OFF
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* LED_STACKCREATED Idle stack created ON OFF
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* LED_INIRQ In an interrupt No change
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* LED_SIGNAL In a signal handler No change
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* LED_ASSERTION An assertion failed No change
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* LED_PANIC The system has crashed OFF Blinking
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* LED_IDLE STM32 is is sleep mode Not used
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*/
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#define LED_STARTED 0
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#define LED_HEAPALLOCATE 0
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#define LED_IRQSENABLED 0
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#define LED_STACKCREATED 1
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#define LED_INIRQ 2
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#define LED_SIGNAL 2
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#define LED_ASSERTION 2
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#define LED_PANIC 3
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/* Button definitions ***************************************************************/
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/* The STM32L-Discovery supports two buttons; only one button is controllable by
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* software:
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*
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* B1 USER: user and wake-up button connected to the I/O PA0 of the STM32L152RBT6.
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* B2 RESET: pushbutton connected to NRST is used to RESET the STM32L152RBT6.
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*/
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#define BUTTON_USER 0
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#define NUM_BUTTONS 1
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#define BUTTON_USER_BIT (1 << BUTTON_USER)
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/* Alternate Pin Functions **********************************************************/
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#endif /* __CONFIG_STM32F0DISCOVERY_INCLUDE_BOARD_H */
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