239 lines
8.2 KiB
C
239 lines
8.2 KiB
C
/****************************************************************************
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* boards/arm/str71x/olimex-strp711/src/str71_enc28j60.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/* ENC28J60 Module
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*
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* The ENC28J60 module does not come on the Olimex-STR-P711, but this
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* describes how I have connected it. NOTE that the ENC28J60 requires an
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* external interrupt (XTI) pin. The only easily accessible XTI pins are on
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* SPI0/1 so you can't have both SPI0 and 1 together with this configuration.
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*
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* Module CON5 QFN ENC2860 Description
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* --------------- -------------------------------------------------------
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* 1 J8-1 NET CS 5 ~CS Chip select input pin for SPI interface
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* (active low)
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* 2 2 SCK 4 SCK Clock in pin for SPI interface
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* 3 3 MOSI 3 SI Data in pin for SPI interface
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* 4 4 MISO 2 SO Data out pin for SPI interface
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* 5 5 GND -- --- ---
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* 10 J9-1 3V3 -- --- ---
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* 9 2 WOL 1 ~WOL Unicast WOL filter
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* 8 3 NET INT 28 ~INT Interrupt output pin (active low)
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* 7 4 CLKOUT 27 CLKOUT Programmable clock output pin
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* 6 5 NET RST 6 ~RESET Active-low device Reset input
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*
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* For the Olimex STR-P711, the ENC28J60 module is placed on SPI0 and uses
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* P0.3 for CS, P0.6 for an interrupt, and P0.4 as a reset:
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*
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* Module CON5 Olimex STR-P711 Connection
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* --------------- -------------------------------------------------------
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* 1 J8-1 NET CS SPI0-2 P0.3 output P0.3/S0.SS/I1.SDA
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* 2 2 SCK SPI0-5 SCLK0 P0.2/S0.SCLK/I1.SCL
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* 3 3 MOSI SPI0-3 MOSI0 P0.0/S0.MOSI/U3.RX
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* 4 4 MISO SPI0-4 MISO0 P0.1/S0.MISO/U3.TX
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* 5 5 GND SPI0-1 GND
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* 10 J9-1 3V3 SPI0-6 3.3V
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* 9 2 WOL NC
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* 8 3 NET INT SPI1-5 P0.6 XTI 11 P0.6/S1.SCLK
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* 7 4 CLKOUT NC
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* 6 5 NET RST SPI1-4 P0.4 output P0.4/S1.MISO
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*
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* UART3, I2C cannot be used with SPI0. The GPIOs selected for the ENC28J60
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* interrupt conflict with TMR1.
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*/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <debug.h>
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#include <nuttx/arch.h>
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#include <nuttx/spi/spi.h>
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#include <nuttx/net/enc28j60.h>
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#include <arch/board/board.h>
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#include "chip.h"
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#include "arm_internal.h"
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#include "str71x.h"
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#ifdef CONFIG_ENC28J60
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Configuration ************************************************************/
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/* We assume that the ENC28J60 is on SPI0 */
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#ifndef CONFIG_STR71X_BSPI0
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# error "Need CONFIG_STR71X_BSPI0 in the configuration"
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#endif
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#ifndef CONFIG_STR71X_XTI
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# error "Need CONFIG_STR71X_XTI in the configuration"
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#endif
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/* UART3, I2C cannot be used with SPI0. The GPIOs selected for the ENC28J60
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* interrupt conflict with BSPI1.
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*/
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#ifdef CONFIG_STR71X_UART3
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# error "CONFIG_STR71X_UART3 cannot be used in this configuration"
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#endif
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#ifdef CONFIG_STR71X_I2C1
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# error "CONFIG_STR71X_I2C1 cannot be used in this configuration"
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#endif
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#ifdef CONFIG_STR71X_BSP1
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# error "CONFIG_STR71X_BSP1 cannot be used in this configuration"
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#endif
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/* SPI Assumptions **********************************************************/
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#define ENC28J60_SPI_PORTNO 0 /* On SPI0 */
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#define ENC28J60_DEVNO 0 /* Only one ENC28J60 */
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#define ENC28J60_IRQ STR71X_IRQ_PORT0p6 /* XTI Line 11: P0.6 */
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/* ENC28J60 additional pins *************************************************
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*
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* NOTE: The ENC28J60 is a 3.3V part; however, it was designed to be
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* easily integrated into 5V systems. The SPI CS, SCK and SI inputs,
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* as well as the RESET pin, are all 5V tolerant. On the other hand,
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* if the host controller is operated at 5V, it quite likely will
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* not be within specifications when its SPI and interrupt inputs
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* are driven by the 3.3V CMOS outputs on the ENC28J60. A
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* unidirectional level translator would be necessary.
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*/
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# define ENC_GPIO0_CS (1 << 3) /* Chip select (P0.3) */
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# define ENC_GPIO0_NETRST (1 << 4) /* Reset (P0.4) */
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# define ENC_GPIO0_NETINT (1 << 6) /* Interrupt (P0.6) */
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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static int up_attach(const struct enc_lower_s *lower, xcpt_t handler,
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void *arg);
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static void up_enable(const struct enc_lower_s *lower);
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static void up_disable(const struct enc_lower_s *lower);
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/* The ENC28J60 normal provides interrupts to the MCU via a GPIO pin. The
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* following structure provides an MCU-independent mechanism for controlling
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* the ENC28J60 GPIO interrupt.
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*/
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static const struct enc_lower_s g_enclower =
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{
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.attach = up_attach,
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.enable = up_enable,
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.disable = up_disable
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};
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: struct enc_lower_s methods
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****************************************************************************/
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static int up_attach(const struct enc_lower_s *lower, xcpt_t handler,
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void *arg)
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{
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return irq_attach(ENC28J60_IRQ, handler, arg);
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}
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static void up_enable(const struct enc_lower_s *lower)
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{
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up_enable_irq(ENC28J60_IRQ);
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}
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static void up_disable(const struct enc_lower_s *lower)
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{
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up_disable_irq(ENC28J60_IRQ);
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: arm_netinitialize
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****************************************************************************/
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void arm_netinitialize(void)
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{
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struct spi_dev_s *spi;
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uint16_t reg16;
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int ret;
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/* Get the SPI port */
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spi = str71_spibus_initialize(ENC28J60_SPI_PORTNO);
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if (!spi)
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{
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nerr("ERROR: Failed to initialize SPI port %d\n", ENC28J60_SPI_PORTNO);
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return;
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}
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/* Configure the XTI for the ENC28J60 interrupt. */
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ret = str71x_xticonfig(ENC28J60_IRQ, false);
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if (ret < 0)
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{
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nerr("ERROR: Failed configure interrupt for IRQ %d: %d\n",
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ENC28J60_IRQ, ret);
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return;
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}
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/* Take ENC28J60 out of reset (active low) */
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reg16 = getreg16(STR71X_GPIO0_PD);
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reg16 &= ~ENC_GPIO0_NETRST;
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putreg16(reg16, STR71X_GPIO0_PD);
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/* Bind the SPI port to the ENC28J60 driver */
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ret = enc_initialize(spi, &g_enclower, ENC28J60_DEVNO);
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if (ret < 0)
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{
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nerr("ERROR: Failed to bind SPI port %d ENC28J60 device %d: %d\n",
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ENC28J60_SPI_PORTNO, ENC28J60_DEVNO, ret);
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return;
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}
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ninfo("Bound SPI port %d to ENC28J60 device %d\n",
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ENC28J60_SPI_PORTNO, ENC28J60_DEVNO);
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}
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#endif /* CONFIG_ENC28J60 */
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