3afc83abc7
Currently the IHC (Inter Hart Communication) depends on OpenAMP and rptun. However, the bootloader portion of the IHC doesn't need either of them. Now they are wasting a lot of bootloader space. Reorganize the bootloader portion into a separate file 'mpfs_ihc_sbi.c'. This file contains the OpenSBI vendor extensions, or the only required functionalities for the bootloader. On the other hand, 'mpfs_ihc.c' contains the non-bootloader code. This patch also makes it possible to utilize 2 RPMSG channels. This has been tested so that 2 separate NuttXs on harts 1 and 2 communicate with Linux kernel that runs on harts 3 and 4. New configuration files are added as well: - rpmsg-ch1: sample config for RPMSG - rpmsg-ch2: sample config for another RPMSG channel - rpmsg-sbi: sample bootloader config for RPMSG/OpenSBI Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
125 lines
3.6 KiB
Plaintext
125 lines
3.6 KiB
Plaintext
/****************************************************************************
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* boards/risc-v/mpfs/icicle/scripts/ld-ihc.script
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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MEMORY
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{
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progmem (rx) : ORIGIN = 0xa2000000, LENGTH = 1M /* w/ cache */
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filler (rx) : ORIGIN = 0xa2100000, LENGTH = 524k
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sram (rwx) : ORIGIN = 0xa2200000, LENGTH = 1M /* w/ cache */
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shared (rwx) : ORIGIN = 0xa4000000, LENGTH = 256k
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}
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OUTPUT_ARCH("riscv")
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__ksram_start = ORIGIN(sram);
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__ksram_size = LENGTH(sram);
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__ksram_end = ORIGIN(sram) + LENGTH(sram);
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ENTRY(_stext)
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EXTERN(__start)
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SECTIONS
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{
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.filler_area : ALIGN(0x1000)
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{
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__filler_area_load = LOADADDR(.filler_area);
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__filler_area_start = .;
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__filler_area_vma_start = .;
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*(.filler_area)
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KEEP(*(.filler_area))
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. = ALIGN(0x1000);
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__filler_area_end = .;
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__filler_area_vma_end = .;
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} > filler
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.amp_ihc : ALIGN(0x1000)
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{
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__amp_ihc_load = LOADADDR(.amp_ihc);
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__amp_ihc_start = .;
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__amp_ihc_vma_start = .;
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*(.amp_ihc)
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. = ALIGN(0x1000);
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__amp_ihc_end = .;
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__amp_ihc_vma_end = .;
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} > shared
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.text : {
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_stext = ABSOLUTE(.);
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*(.start .start.*)
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*(.text .text.*)
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*(.fixup)
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*(.gnu.warning)
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*(.rodata .rodata.* .srodata .srodata.*)
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*(.gnu.linkonce.t.*)
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*(.glue_7)
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*(.glue_7t)
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*(.got)
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*(.gcc_except_table)
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*(.gnu.linkonce.r.*)
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_etext = ABSOLUTE(.);
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} > progmem
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.init_section : ALIGN(4) {
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_sinit = ABSOLUTE(.);
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KEEP(*(.init_array .init_array.*))
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_einit = ABSOLUTE(.);
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} > progmem
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_eronly = ABSOLUTE(.);
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.data : ALIGN(4) {
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_sdata = ABSOLUTE(.);
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*(.data .data.*)
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*(.sdata .sdata.* .sdata2.*)
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*(.gnu.linkonce.d.*)
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*(.gnu.linkonce.s.*)
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CONSTRUCTORS
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. = ALIGN(4);
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_edata = ABSOLUTE(.);
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} > sram AT > progmem
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PROVIDE(__global_pointer$ = _sdata + ((_edata - _sdata) / 2));
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.bss : ALIGN(4) {
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_sbss = ABSOLUTE(.);
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*(.bss .bss.*)
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*(.sbss .sbss.*)
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*(.gnu.linkonce.b.*)
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*(.gnu.linkonce.sb.*)
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*(COMMON)
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. = ALIGN(32);
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_ebss = ABSOLUTE(.);
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} > sram
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_info 0 : { *(.debug_info) }
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.debug_line 0 : { *(.debug_line) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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.debug_aranges 0 : { *(.debug_aranges) }
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}
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