101 lines
4.3 KiB
C
101 lines
4.3 KiB
C
/****************************************************************************
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* boards/arm/lpc31xx/ea3152/include/board.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __BOARDS_ARM_LPC31XX_EA3152_INCLUDE_BOARD_H
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#define __BOARDS_ARM_LPC31XX_EA3152_INCLUDE_BOARD_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#ifndef __ASSEMBLY__
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# include <stdint.h>
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#endif
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Clocking *****************************************************************/
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/* Frequency of the FFAST input */
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#define BOARD_FREQIN_FFAST (12000000) /* ffast (12 MHz crystal) */
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/* HPLL0 configuration */
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#define BOARD_HPLL0_FINSEL CGU_HPFINSEL_FFAST /* Frequency input selection */
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#define BOARD_HPLL0_NDEC 131 /* PLL N-divider value */
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#define BOARD_HPLL0_MDEC 29784 /* PLL M-divider value */
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#define BOARD_HPLL0_PDEC 7 /* PLL P-divider value */
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#define BOARD_HPLL0_SELR 0 /* SELR bandwidth selection */
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#define BOARD_HPLL0_SELI 8 /* SELI bandwidth selection */
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#define BOARD_HPLL0_SELP 31 /* SELP bandwidth selection */
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#define BOARD_HPLL0_MODE 0 /* PLL mode */
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#define BOARD_HPLL0_FREQ 406425600 /* Frequency of the PLL in MHz */
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/* HPLL1 configuration */
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#define BOARD_HPLL1_FINSEL CGU_HPFINSEL_FFAST /* Frequency input selection */
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#define BOARD_HPLL1_NDEC 770 /* PLL N-divider value */
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#define BOARD_HPLL1_MDEC 8191 /* PLL M-divider value */
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#define BOARD_HPLL1_PDEC 98 /* PLL P-divider value */
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#define BOARD_HPLL1_SELR 0 /* SELR bandwidth selection */
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#define BOARD_HPLL1_SELI 16 /* SELI bandwidth selection */
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#define BOARD_HPLL1_SELP 8 /* SELP bandwidth selection */
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#define BOARD_HPLL1_MODE 0 /* PLL mode */
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#define BOARD_HPLL1_FREQ 180000000 /* Frequency of the PLL in MHz */
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/* The following 3 bitsets determine which clocks will be enabled at
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* initialization time.
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*/
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#define BOARD_CLKS_0_31 \
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(_RBIT(CLKID_APB0CLK,0)|_RBIT(CLKID_APB1CLK,0)|_RBIT(CLKID_APB2CLK,0)|\
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_RBIT(CLKID_APB3CLK,0)|_RBIT(CLKID_APB4CLK,0)|_RBIT(CLKID_AHB2INTCCLK,0)|\
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_RBIT(CLKID_AHB0CLK,0)|_RBIT(CLKID_ARM926CORECLK,0)|_RBIT(CLKID_ARM926BUSIFCLK,0)|\
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_RBIT(CLKID_ARM926RETIMECLK,0)|_RBIT(CLKID_ISRAM0CLK,0)|_RBIT(CLKID_ISRAM1CLK,0)|\
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_RBIT(CLKID_ISROMCLK,0)|_RBIT(CLKID_INTCCLK,0)|_RBIT(CLKID_AHB2APB0PCLK,0)|\
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_RBIT(CLKID_EVENTROUTERPCLK,0)|_RBIT(CLKID_CLOCKOUT,0))
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#define BOARD_CLKS_32_63 \
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(_RBIT(CLKID_IOCONFPCLK,32)|_RBIT(CLKID_CGUPCLK,32)|_RBIT(CLKID_SYSCREGPCLK,32)|\
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_RBIT(CLKID_OTPPCLK,32)|_RBIT(CLKID_AHB2APB1PCLK,32)|_RBIT(CLKID_AHB2APB2PCLK,32)|\
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_RBIT(CLKID_AHB2APB3PCLK,32)|_RBIT(CLKID_EDGEDETPCLK,32))
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#define BOARD_CLKS_64_92 \
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(0)
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/* LED definitions **********************************************************/
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#define LED_STARTED 0
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#define LED_HEAPALLOCATE 1
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#define LED_IRQSENABLED 2
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#define LED_STACKCREATED 3
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#define LED_INIRQ 4
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#define LED_SIGNAL 5
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#define LED_ASSERTION 6
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#define LED_PANIC 7
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/* Button definitions *******************************************************/
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#endif /* __BOARDS_ARM_LPC31XX_EA3152_INCLUDE__BOARD_H */
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