b2c1930825
Some UART Controllers (Synopsys DesignWare 8250) will trigger spurious interrupts when the Line Control Register (LCR) is set while the UART is busy. This patch provides the option (16550_WAIT_LCR) to wait for UART until it's not busy, before setting the LCR. (16550_WAIT_LCR is disabled by default) This patch fixes the spurious UART interrupts for the upcoming port of NuttX to StarFive JH7110 SoC (with Synopsys DesignWare 8250 UART). [The patch is explained here](https://lupyuen.github.io/articles/plic#appendix-fix-the-spurious-uart-interrupts) drivers/serial/uart_16550.c: If 16550_WAIT_LCR is enabled, wait until UART is not busy before setting LCR include/nuttx/serial/uart_16550.h: Define the UART Status Register (USR) for checking if UART is busy drivers/serial/Kconfig-16550: Added option 16550_WAIT_LCR to 16550 UART Config, disabled by default
532 lines
11 KiB
Plaintext
532 lines
11 KiB
Plaintext
#
|
|
# For a description of the syntax of this configuration file,
|
|
# see the file kconfig-language.txt in the NuttX tools repository.
|
|
#
|
|
|
|
if 16550_UART
|
|
|
|
config 16550_SERIAL_DISABLE_REORDERING
|
|
bool "Disable reordering of ttySx devices."
|
|
default n
|
|
---help---
|
|
NuttX per default reorders the serial ports (/dev/ttySx) so that the
|
|
console is always on /dev/ttyS0. If more than one UART is in use this
|
|
can, however, have the side-effect that all port mappings
|
|
(hardware USART1 -> /dev/ttyS0) change if the console is moved to another
|
|
UART. This option disables that re-ordering for 16550 UARTs.
|
|
|
|
config 16550_UART0
|
|
bool "16550 UART0"
|
|
default n
|
|
|
|
if 16550_UART0
|
|
|
|
config 16550_UART0_BASE
|
|
hex "16550 UART0 base address"
|
|
|
|
config 16550_UART0_CLOCK
|
|
int "16550 UART0 clock"
|
|
|
|
config 16550_UART0_CLOCK_NAME
|
|
string "16550 UART0 clock name"
|
|
depends on CLK
|
|
|
|
config 16550_UART0_IRQ
|
|
int "16550 UART0 IRQ number"
|
|
|
|
config 16550_UART0_BAUD
|
|
int "16550 UART0 BAUD"
|
|
default 115200
|
|
|
|
config 16550_UART0_PARITY
|
|
int "16550 UART0 parity"
|
|
default 0
|
|
range 0 2
|
|
---help---
|
|
16550 UART0 parity. 0=None, 1=Odd, 2=Even. Default: None
|
|
|
|
config 16550_UART0_BITS
|
|
int "16550 UART0 number of bits"
|
|
default 8
|
|
---help---
|
|
16550 UART0 number of bits. Default: 8
|
|
|
|
config 16550_UART0_2STOP
|
|
int "16550 UART0 two stop bits"
|
|
default 0
|
|
---help---
|
|
0=1 stop bit, 1=Two stop bits. Default: 1 stop bit
|
|
|
|
config 16550_UART0_RXBUFSIZE
|
|
int "16550 UART0 Rx buffer size"
|
|
default 256
|
|
---help---
|
|
16550 UART0 Rx buffer size. Default: 256
|
|
|
|
config 16550_UART0_TXBUFSIZE
|
|
int "16550 UART0 Tx buffer size"
|
|
default 256
|
|
---help---
|
|
16550 UART0 Tx buffer size. Default: 256
|
|
|
|
config 16550_UART0_IFLOWCONTROL
|
|
bool "16550 UART0 RTS flow control"
|
|
default n
|
|
select SERIAL_IFLOWCONTROL
|
|
---help---
|
|
Enable 16550 UART0 RTS flow control
|
|
|
|
config 16550_UART0_OFLOWCONTROL
|
|
bool "16550 UART0 CTS flow control"
|
|
default n
|
|
select SERIAL_OFLOWCONTROL
|
|
---help---
|
|
Enable 16550 UART0 CTS flow control
|
|
|
|
config 16550_UART0_DMA
|
|
bool "16550 UART0 DMA support"
|
|
default n
|
|
select ARCH_DMA
|
|
select SERIAL_DMA
|
|
---help---
|
|
Enable DMA transfers on 16550 UART0
|
|
|
|
if 16550_UART0_DMA
|
|
|
|
config 16550_UART0_DMA_TX
|
|
int "16550 UART0 DMA Tx channel identity"
|
|
default -1
|
|
---help---
|
|
-1 means don't use DMA for sending
|
|
|
|
config 16550_UART0_DMA_RX
|
|
int "16550 UART0 DMA Rx channel identity"
|
|
default -1
|
|
---help---
|
|
-1 means don't use DMA for receiving
|
|
|
|
config 16550_UART0_DMA_RXBUFSIZE
|
|
int "16550 UART0 DMA Rx buffer size"
|
|
depends on 16550_UART0_DMA_RX != -1
|
|
default 16550_UART0_RXBUFSIZE
|
|
---help---
|
|
16550 UART0 DMA Rx buffer size.
|
|
|
|
config 16550_UART0_DMA_RXTIMEOUT
|
|
int "16550 UART0 DMA Rx timeout(char)"
|
|
depends on 16550_UART0_DMA_RX != -1
|
|
default 1
|
|
---help---
|
|
0 means DMA has no timeout for receiving
|
|
|
|
endif
|
|
|
|
endif # 16550_UART0
|
|
|
|
config 16550_UART1
|
|
bool "16550 UART1"
|
|
default n
|
|
|
|
if 16550_UART1
|
|
|
|
config 16550_UART1_BASE
|
|
hex "16550 UART1 base address"
|
|
|
|
config 16550_UART1_CLOCK
|
|
int "16550 UART1 clock"
|
|
|
|
config 16550_UART1_CLOCK_NAME
|
|
string "16550 UART1 clock name"
|
|
depends on CLK
|
|
|
|
config 16550_UART1_IRQ
|
|
int "16550 UART1 IRQ number"
|
|
|
|
config 16550_UART1_BAUD
|
|
int "16550 UART1 BAUD"
|
|
default 115200
|
|
|
|
config 16550_UART1_PARITY
|
|
int "16550 UART1 parity"
|
|
default 0
|
|
range 0 2
|
|
---help---
|
|
16550 UART1 parity. 0=None, 1=Odd, 2=Even. Default: None
|
|
|
|
config 16550_UART1_BITS
|
|
int "16550 UART1 number of bits"
|
|
default 8
|
|
---help---
|
|
16550 UART1 number of bits. Default: 8
|
|
|
|
config 16550_UART1_2STOP
|
|
int "16550 UART1 two stop bits"
|
|
default 0
|
|
---help---
|
|
0=1 stop bit, 1=Two stop bits. Default: 1 stop bit
|
|
|
|
config 16550_UART1_RXBUFSIZE
|
|
int "16550 UART1 Rx buffer size"
|
|
default 256
|
|
---help---
|
|
16550 UART1 Rx buffer size. Default: 256
|
|
|
|
config 16550_UART1_TXBUFSIZE
|
|
int "16550 UART1 Tx buffer size"
|
|
default 256
|
|
---help---
|
|
16550 UART1 Tx buffer size. Default: 256
|
|
|
|
config 16550_UART1_IFLOWCONTROL
|
|
bool "16550 UART1 RTS flow control"
|
|
default n
|
|
select SERIAL_IFLOWCONTROL
|
|
---help---
|
|
Enable 16550 UART1 RTS flow control
|
|
|
|
config 16550_UART1_OFLOWCONTROL
|
|
bool "16550 UART1 CTS flow control"
|
|
default n
|
|
select SERIAL_OFLOWCONTROL
|
|
---help---
|
|
Enable 16550 UART1 CTS flow control
|
|
|
|
config 16550_UART1_DMA
|
|
bool "16550 UART1 DMA support"
|
|
default n
|
|
select ARCH_DMA
|
|
select SERIAL_DMA
|
|
---help---
|
|
Enable DMA transfers on 16550 UART1
|
|
|
|
if 16550_UART1_DMA
|
|
|
|
config 16550_UART1_DMA_TX
|
|
int "16550 UART1 DMA Tx channel identity"
|
|
default -1
|
|
---help---
|
|
-1 means don't use DMA for sending
|
|
|
|
config 16550_UART1_DMA_RX
|
|
int "16550 UART1 DMA Rx channel identity"
|
|
default -1
|
|
---help---
|
|
-1 means don't use DMA for receiving
|
|
|
|
config 16550_UART1_DMA_RXBUFSIZE
|
|
int "16550 UART1 DMA Rx buffer size"
|
|
depends on 16550_UART1_DMA_RX != -1
|
|
default 16550_UART1_RXBUFSIZE
|
|
---help---
|
|
16550 UART1 DMA Rx buffer size.
|
|
|
|
config 16550_UART1_DMA_RXTIMEOUT
|
|
int "16550 UART1 DMA Rx timeout(char)"
|
|
depends on 16550_UART1_DMA_RX != -1
|
|
default 1
|
|
---help---
|
|
0 means DMA has no timeout for receiving
|
|
|
|
endif
|
|
|
|
endif # 16550_UART1
|
|
|
|
config 16550_UART2
|
|
bool "16550 UART2"
|
|
default n
|
|
|
|
if 16550_UART2
|
|
|
|
config 16550_UART2_BASE
|
|
hex "16550 UART2 base address"
|
|
|
|
config 16550_UART2_CLOCK
|
|
int "16550 UART2 clock"
|
|
|
|
config 16550_UART2_CLOCK_NAME
|
|
string "16550 UART2 clock name"
|
|
depends on CLK
|
|
|
|
config 16550_UART2_IRQ
|
|
int "16550 UART2 IRQ number"
|
|
|
|
config 16550_UART2_BAUD
|
|
int "16550 UART2 BAUD"
|
|
default 115200
|
|
|
|
config 16550_UART2_PARITY
|
|
int "16550 UART2 parity"
|
|
default 0
|
|
range 0 2
|
|
---help---
|
|
16550 UART2 parity. 0=None, 1=Odd, 2=Even. Default: None
|
|
|
|
config 16550_UART2_BITS
|
|
int "16550 UART2 number of bits"
|
|
default 8
|
|
---help---
|
|
16550 UART2 number of bits. Default: 8
|
|
|
|
config 16550_UART2_2STOP
|
|
int "16550 UART2 two stop bits"
|
|
default 0
|
|
---help---
|
|
0=1 stop bit, 1=Two stop bits. Default: 1 stop bit
|
|
|
|
config 16550_UART2_RXBUFSIZE
|
|
int "16550 UART2 Rx buffer size"
|
|
default 256
|
|
---help---
|
|
16550 UART2 Rx buffer size. Default: 256
|
|
|
|
config 16550_UART2_TXBUFSIZE
|
|
int "16550 UART2 Tx buffer size"
|
|
default 256
|
|
---help---
|
|
16550 UART2 Tx buffer size. Default: 256
|
|
|
|
config 16550_UART2_IFLOWCONTROL
|
|
bool "16550 UART2 RTS flow control"
|
|
default n
|
|
select SERIAL_IFLOWCONTROL
|
|
---help---
|
|
Enable 16550 UART2 RTS flow control
|
|
|
|
config 16550_UART2_OFLOWCONTROL
|
|
bool "16550 UART2 CTS flow control"
|
|
default n
|
|
select SERIAL_OFLOWCONTROL
|
|
---help---
|
|
Enable 16550 UART2 CTS flow control
|
|
|
|
config 16550_UART2_DMA
|
|
bool "16550 UART2 DMA support"
|
|
default n
|
|
select ARCH_DMA
|
|
select SERIAL_DMA
|
|
---help---
|
|
Enable DMA transfers on 16550 UART2
|
|
|
|
if 16550_UART2_DMA
|
|
|
|
config 16550_UART2_DMA_TX
|
|
int "16550 UART2 DMA Tx channel identity"
|
|
default -1
|
|
---help---
|
|
-1 means don't use DMA for sending
|
|
|
|
config 16550_UART2_DMA_RX
|
|
int "16550 UART2 DMA Rx channel identity"
|
|
default -1
|
|
---help---
|
|
-1 means don't use DMA for receiving
|
|
|
|
config 16550_UART2_DMA_RXBUFSIZE
|
|
int "16550 UART2 DMA Rx buffer size"
|
|
depends on 16550_UART2_DMA_RX != -1
|
|
default 16550_UART2_RXBUFSIZE
|
|
---help---
|
|
16550 UART2 DMA Rx buffer size.
|
|
|
|
config 16550_UART2_DMA_RXTIMEOUT
|
|
int "16550 UART2 DMA Rx timeout(char)"
|
|
depends on 16550_UART2_DMA_RX != -1
|
|
default 1
|
|
---help---
|
|
0 means DMA has no timeout for receiving
|
|
|
|
endif
|
|
|
|
endif # 16550_UART2
|
|
|
|
config 16550_UART3
|
|
bool "16550 UART3"
|
|
default n
|
|
|
|
if 16550_UART3
|
|
|
|
config 16550_UART3_BASE
|
|
hex "16550 UART3 base address"
|
|
|
|
config 16550_UART3_CLOCK
|
|
int "16550 UART3 clock"
|
|
|
|
config 16550_UART3_CLOCK_NAME
|
|
string "16550 UART3 clock name"
|
|
depends on CLK
|
|
|
|
config 16550_UART3_IRQ
|
|
int "16550 UART3 IRQ number"
|
|
|
|
config 16550_UART3_BAUD
|
|
int "16550 UART3 BAUD"
|
|
default 115200
|
|
|
|
config 16550_UART3_PARITY
|
|
int "16550 UART3 parity"
|
|
default 0
|
|
range 0 2
|
|
---help---
|
|
16550 UART3 parity. 0=None, 1=Odd, 2=Even. Default: None
|
|
|
|
config 16550_UART3_BITS
|
|
int "16550 UART3 number of bits"
|
|
default 8
|
|
---help---
|
|
16550 UART3 number of bits. Default: 8
|
|
|
|
config 16550_UART3_2STOP
|
|
int "16550 UART3 two stop bits"
|
|
default 0
|
|
---help---
|
|
0=1 stop bit, 1=Two stop bits. Default: 1 stop bit
|
|
|
|
config 16550_UART3_RXBUFSIZE
|
|
int "16550 UART3 Rx buffer size"
|
|
default 256
|
|
---help---
|
|
16550 UART3 Rx buffer size. Default: 256
|
|
|
|
config 16550_UART3_TXBUFSIZE
|
|
int "16550 UART3 Tx buffer size"
|
|
default 256
|
|
---help---
|
|
16550 UART3 Tx buffer size. Default: 256
|
|
|
|
config 16550_UART3_IFLOWCONTROL
|
|
bool "16550 UART3 RTS flow control"
|
|
default n
|
|
select SERIAL_IFLOWCONTROL
|
|
---help---
|
|
Enable 16550 UART3 RTS flow control
|
|
|
|
config 16550_UART3_OFLOWCONTROL
|
|
bool "16550 UART3 CTS flow control"
|
|
default n
|
|
select SERIAL_OFLOWCONTROL
|
|
---help---
|
|
Enable 16550 UART3 CTS flow control
|
|
|
|
config 16550_UART3_DMA
|
|
bool "16550 UART3 DMA support"
|
|
default n
|
|
select ARCH_DMA
|
|
select SERIAL_DMA
|
|
---help---
|
|
Enable DMA transfers on 16550 UART3
|
|
|
|
if 16550_UART3_DMA
|
|
|
|
config 16550_UART3_DMA_TX
|
|
int "16550 UART3 DMA Tx channel identity"
|
|
default -1
|
|
---help---
|
|
-1 means don't use DMA for sending
|
|
|
|
config 16550_UART3_DMA_RX
|
|
int "16550 UART3 DMA Rx channel identity"
|
|
default -1
|
|
---help---
|
|
-1 means don't use DMA for receiving
|
|
|
|
config 16550_UART3_DMA_RXBUFSIZE
|
|
int "16550 UART3 DMA Rx buffer size"
|
|
depends on 16550_UART3_DMA_RX != -1
|
|
default 16550_UART3_RXBUFSIZE
|
|
---help---
|
|
16550 UART3 DMA Rx buffer size.
|
|
|
|
config 16550_UART3_DMA_RXTIMEOUT
|
|
int "16550 UART3 DMA Rx timeout(char)"
|
|
depends on 16550_UART3_DMA_RX != -1
|
|
default 1
|
|
---help---
|
|
0 means DMA has no timeout for receiving
|
|
|
|
endif
|
|
|
|
endif # 16550_UART3
|
|
|
|
choice
|
|
prompt "16550 Serial Console"
|
|
default 16550_NO_SERIAL_CONSOLE
|
|
depends on DEV_CONSOLE
|
|
|
|
config 16550_UART0_SERIAL_CONSOLE
|
|
bool "16550 UART0 serial console"
|
|
depends on 16550_UART0
|
|
select SERIAL_CONSOLE
|
|
|
|
config 16550_UART1_SERIAL_CONSOLE
|
|
bool "16550 UART1 serial console"
|
|
depends on 16550_UART1
|
|
select SERIAL_CONSOLE
|
|
|
|
config 16550_UART2_SERIAL_CONSOLE
|
|
bool "16550 UART2 serial console"
|
|
depends on 16550_UART2
|
|
select SERIAL_CONSOLE
|
|
|
|
config 16550_UART3_SERIAL_CONSOLE
|
|
bool "16550 UART3 serial console"
|
|
depends on 16550_UART3
|
|
select SERIAL_CONSOLE
|
|
|
|
config 16550_NO_SERIAL_CONSOLE
|
|
bool "No 16550 serial console"
|
|
|
|
endchoice # 16550 Serial Console
|
|
|
|
config 16550_SUPRESS_CONFIG
|
|
bool "Suppress 16550 configuration"
|
|
default n
|
|
|
|
config 16550_SUPRESS_INITIAL_CONFIG
|
|
bool "Suppress initial 16550 configuration"
|
|
depends on !16550_SUPRESS_CONFIG
|
|
default n
|
|
---help---
|
|
This option is useful, for example, if you are using a bootloader
|
|
that configures the 16550_UART. In that case, you may want to
|
|
just leave the existing console configuration in place. Default: n
|
|
|
|
config SERIAL_UART_ARCH_MMIO
|
|
bool "Platform access register through the memory mapping"
|
|
default n
|
|
|
|
config SERIAL_UART_ARCH_IOCTL
|
|
bool "Platform has own custom IOCTL"
|
|
default n
|
|
|
|
config 16550_REGINCR
|
|
int "Address increment between 16550 registers"
|
|
default 1
|
|
---help---
|
|
The address increment between 16550 registers. Options are 1, 2, or 4.
|
|
Default: 1
|
|
|
|
config 16550_REGWIDTH
|
|
int "Bit width of 16550 registers"
|
|
default 8
|
|
---help---
|
|
The bit width of registers. Options are 8, 16, or 32. Default: 8
|
|
|
|
config 16550_ADDRWIDTH
|
|
int "Address width of 16550 registers"
|
|
default 8
|
|
---help---
|
|
The bit width of registers. Options are 0, 8, 16, or 32.
|
|
Default: 8
|
|
Note: 0 means auto detect address size (uintptr_t)
|
|
|
|
config 16550_WAIT_LCR
|
|
bool "Wait for UART before setting LCR"
|
|
default n
|
|
---help---
|
|
Before setting the Line Control Register (LCR), wait until UART is
|
|
not busy. This is required for Synopsys DesignWare 8250, which
|
|
will trigger spurious interrupts when setting the LCR without
|
|
waiting. Default: n
|
|
|
|
endif # 16550_UART
|