e77b06721b
N/A Summary: Arm64 support for NuttX, Features supported: 1. Cortex-a53 single core and SMP support: it's can run into nsh shell at qemu virt machine. 2. qemu-a53 board configuration support: it's only for evaluate propose 3. FPU support for armv8-a: FPU context switching at NEON/floating-point TRAP is supported. 4. psci interface, armv8 cache operation(data cache) and smccc support. 5. fix mass code style issue, thank for @xiaoxiang781216, @hartmannathan @pkarashchenko Please refer to boards/arm64/qemu/qemu-a53/README.txt for detail Note: 1. GCC MACOS issue The GCC 11.2 toolchain for MACOS may get crash while compiling float operation function, the following link describe the issue and give analyse at the issue: https://bugs.linaro.org/show_bug.cgi?id=5825 it's seem GCC give a wrong instruction at certain machine which without architecture features the new toolchain is not available still, so just disable the MACOS cibuild check at present Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
140 lines
4.4 KiB
C
140 lines
4.4 KiB
C
/****************************************************************************
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* arch/arm64/include/arch.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/* This file should never be included directly but, rather,
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* only indirectly through nuttx/arch.h
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*/
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#ifndef __ARCH_ARM64_INCLUDE_ARCH_H
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#define __ARCH_ARM64_INCLUDE_ARCH_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#ifndef __ASSEMBLY__
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# include <stdint.h>
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# include <nuttx/pgalloc.h>
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# include <nuttx/addrenv.h>
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#endif
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/****************************************************************************
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* Pre-processor Prototypes
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****************************************************************************/
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#ifdef CONFIG_ARCH_ADDRENV
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#if CONFIG_MM_PGSIZE != 4096
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# error Only pages sizes of 4096 are currently supported (CONFIG_ARCH_ADDRENV)
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#endif
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#endif /* CONFIG_ARCH_ADDRENV */
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/****************************************************************************
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* Inline functions
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****************************************************************************/
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/****************************************************************************
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* Public Types
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****************************************************************************/
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#ifdef CONFIG_ARCH_ADDRENV
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/* The task group resources are retained in a single structure, task_group_s
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* that is defined in the header file nuttx/include/nuttx/sched.h. The type
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* group_addrenv_t must be defined by platform specific logic in
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* nuttx/arch/<architecture>/include/arch.h.
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*
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* These tables would hold the physical address of the level 2 page tables.
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* All would be initially NULL and would not be backed up with physical
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* memory until mappings in the level 2 page table are required.
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*/
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struct group_addrenv_s
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{
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/* Level 1 page table entries for each group section */
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uintptr_t *text[ARCH_TEXT_NSECTS];
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uintptr_t *data[ARCH_DATA_NSECTS];
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#ifdef CONFIG_BUILD_KERNEL
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uintptr_t *heap[ARCH_HEAP_NSECTS];
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#ifdef CONFIG_MM_SHM
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uintptr_t *shm[ARCH_SHM_NSECTS];
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#endif
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/* Initial heap allocation (in bytes). This exists only provide an
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* indirect path for passing the size of the initial heap to the heap
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* initialization logic. These operations are separated in time and
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* architecture. REVISIT: I would like a better way to do this.
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*/
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size_t heapsize;
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#endif
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};
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typedef struct group_addrenv_s group_addrenv_t;
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/* This type is used when the OS needs to temporarily instantiate a
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* different address environment. Used in the implementation of
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*
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* int up_addrenv_select(group_addrenv_t addrenv, save_addrenv_t *oldenv);
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* int up_addrenv_restore(save_addrenv_t oldenv);
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*
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* In this case, the saved value in the L1 page table are returned
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*/
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struct save_addrenv_s
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{
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uint32_t text[ARCH_TEXT_NSECTS];
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uint32_t data[ARCH_DATA_NSECTS];
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#ifdef CONFIG_BUILD_KERNEL
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uint32_t heap[ARCH_HEAP_NSECTS];
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#ifdef CONFIG_MM_SHM
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uint32_t shm[ARCH_SHM_NSECTS];
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#endif
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#endif
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};
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typedef struct save_addrenv_s save_addrenv_t;
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#endif
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#ifdef __cplusplus
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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#endif /* __ARCH_ARM64_INCLUDE_ARCH_H */
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