chao an b15c1a441a arm/gicv3: set routing affinity before enable IRQ ... In corner case, the pending ISR will be triggered immediately after enable the IRQ, this PR will setting CPU affinity first to avoid routing the unexpected IRQ to other CPUs. Signed-off-by: chao an <anchao@lixiang.com>		2024-09-03 19:14:14 -03:00
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include	nuttx: fix multiple 'FAR', 'CODE' and style issues	2024-08-25 19:22:15 +08:00
src	arm/gicv3: set routing affinity before enable IRQ	2024-09-03 19:14:14 -03:00
CMakeLists.txt	CMake:init arm64 CMake qemu-armv8a build	2023-12-27 07:27:17 -08:00
Kconfig	arch/arm64: Move ELF_64BIT selection to arch/Kconfig	2024-08-28 07:45:36 -04:00