nuttx/arch/xtensa/include
Tiago Medicci Serrano 57b8fc9954 esp32/irq: Allow IRAM ISRs to run during SPI flash operation
This commit provides an interface to register ISRs that run from
IRAM and keeps track of the non-IRAM interrupts. It enables, for
instance, to avoid disabling all the interrupts during a SPI flash
operation: IRAM-enabled ISRs are, then, able to run during these
operations.

It also makes the code look more similar to the ESP32-S3 SPI flash
implementation by creating a common `esp32_spiflash_init` that is
responsible to create the SPI flash operation tasks. The function
intended to initialize the SPI flash partions was, then, renamed to
`board_spiflash_init`.
2023-11-10 09:11:35 +08:00
..
esp32 esp32/irq: Allow IRAM ISRs to run during SPI flash operation 2023-11-10 09:11:35 +08:00
esp32s2 xtensa/esp32s2: Add support to TWAI/CANBus controller 2023-09-28 09:35:08 +08:00
esp32s3 xtensa/esp32s3: Disable psram as task stack 2023-11-08 16:25:57 -03:00
lx6
lx7 xtensa: Add initial support for ESP32-S3 2022-01-27 13:46:50 -03:00
xtensa Indent the define statement by two spaces 2023-05-21 09:52:08 -03:00
.gitignore
arch.h xtensa/esp32s3: Disable psram as task stack 2023-11-08 16:25:57 -03:00
elf.h
inttypes.h arch: Omni Hoverboards: update licenses to Apache 2021-09-28 04:37:38 -07:00
irq.h xtensa: Define COMMON_CTX_REGS for chips without FPU (e.g. ESP32-S2) 2022-10-27 23:28:47 +08:00
limits.h arch: Define WCHAR_[MIN|MAX] in arch/include/limits.h 2022-06-03 22:25:49 +03:00
loadstore.h
setjmp.h xtensa: add setjmp.h include file 2021-11-17 02:23:45 -06:00
simcall.h
spinlock.h
stdarg.h arch:xtensa: add arch stdarg.h include file for xtensa 2021-08-09 17:58:25 -03:00
syscall.h xtensa: Add missing input operand on sys_call6 inline ASM 2022-05-18 15:46:57 +02:00
types.h arch: Add _wchar_t typedef like other basic types 2021-12-09 16:57:23 +09:00