231b8518b7
Ken Pettit has submitted the ICLA and we can migrate the licenses to Apache. Sebastien Lorquet has submitted the ICLA and we can migrate the licenses to Apache. Gregory Nutt has submitted the SGA and we can migrate the licenses to Apache. Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
310 lines
9.8 KiB
C
310 lines
9.8 KiB
C
/****************************************************************************
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* arch/misoc/include/minerva/irq.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/* This file should never be included directly but, rather, only indirectly
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* through nuttx/irq.h
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*/
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#ifndef __ARCH_MINERVA_INCLUDE_IRQ_H
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#define __ARCH_MINERVA_INCLUDE_IRQ_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <arch/types.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Configuration ************************************************************/
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/* If this is a kernel build, how many nested system calls should we
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* support?
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*/
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#define MINERVA_NINTERRUPTS 32
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#define MINERVA_IRQ_SWINT 32
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#define NR_IRQS 33
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#ifndef CONFIG_SYS_NNEST
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# define CONFIG_SYS_NNEST 2
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#endif
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#define REG_X0_NDX 0
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#define REG_X1_NDX 1
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#define REG_X2_NDX 2
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#define REG_X3_NDX 3
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#define REG_X4_NDX 4
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#define REG_X5_NDX 5
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#define REG_X6_NDX 6
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#define REG_X7_NDX 7
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#define REG_X8_NDX 8
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#define REG_X9_NDX 9
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#define REG_X10_NDX 10
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#define REG_X11_NDX 11
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#define REG_X12_NDX 12
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#define REG_X13_NDX 13
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#define REG_X14_NDX 14
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#define REG_X15_NDX 15
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#define REG_X16_NDX 16
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#define REG_X17_NDX 17
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#define REG_X18_NDX 18
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#define REG_X19_NDX 19
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#define REG_X20_NDX 20
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#define REG_X21_NDX 21
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#define REG_X22_NDX 22
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#define REG_X23_NDX 23
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#define REG_X24_NDX 24
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#define REG_X25_NDX 25
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#define REG_X26_NDX 26
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#define REG_X27_NDX 27
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#define REG_X28_NDX 28
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#define REG_X29_NDX 29
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#define REG_X30_NDX 30
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#define REG_X31_NDX 31
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#define REG_CSR_MSTATUS_NDX 32
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#define REG_CSR_MEPC_NDX 33
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#define REG_CSR_MBADADDR_NDX 34
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#define REG_CSR_MCAUSE_NDX 35
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#define XCPTCONTEXT_REGS 36
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#define XCPTCONTEXT_SIZE (4 * XCPTCONTEXT_REGS)
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/* In assembly language, values have to be referenced as byte address
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* offsets. But in C, it is more convenient to reference registers as
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* register save table offsets.
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*/
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#ifdef __ASSEMBLY__
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# define REG_X0 (4*REG_X0_NDX)
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# define REG_X1 (4*REG_X1_NDX)
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# define REG_X2 (4*REG_X2_NDX)
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# define REG_X3 (4*REG_X3_NDX)
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# define REG_X4 (4*REG_X4_NDX)
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# define REG_X5 (4*REG_X5_NDX)
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# define REG_X6 (4*REG_X6_NDX)
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# define REG_X7 (4*REG_X7_NDX)
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# define REG_X8 (4*REG_X8_NDX)
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# define REG_X9 (4*REG_X9_NDX)
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# define REG_X10 (4*REG_X10_NDX)
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# define REG_X11 (4*REG_X11_NDX)
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# define REG_X12 (4*REG_X12_NDX)
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# define REG_X13 (4*REG_X13_NDX)
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# define REG_X14 (4*REG_X14_NDX)
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# define REG_X15 (4*REG_X15_NDX)
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# define REG_X16 (4*REG_X16_NDX)
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# define REG_X17 (4*REG_X17_NDX)
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# define REG_X18 (4*REG_X18_NDX)
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# define REG_X19 (4*REG_X19_NDX)
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# define REG_X20 (4*REG_X20_NDX)
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# define REG_X21 (4*REG_X21_NDX)
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# define REG_X22 (4*REG_X22_NDX)
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# define REG_X23 (4*REG_X23_NDX)
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# define REG_X24 (4*REG_X24_NDX)
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# define REG_X25 (4*REG_X25_NDX)
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# define REG_X26 (4*REG_X26_NDX)
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# define REG_X27 (4*REG_X27_NDX)
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# define REG_X28 (4*REG_X28_NDX)
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# define REG_X29 (4*REG_X29_NDX)
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# define REG_X30 (4*REG_X30_NDX)
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# define REG_X31 (4*REG_X31_NDX)
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# define REG_CSR_MSTATUS (4*REG_CSR_MSTATUS_NDX)
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# define REG_CSR_MEPC (4*REG_CSR_MEPC_NDX)
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# define REG_CSR_MBADADDR (4*REG_CSR_MBADADDR_NDX)
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# define REG_CSR_MCAUSE (4*REG_CSR_MCAUSE_NDX)
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#else
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# define REG_X0 REG_X0_NDX
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# define REG_X1 REG_X1_NDX
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# define REG_X2 REG_X2_NDX
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# define REG_X3 REG_X3_NDX
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# define REG_X4 REG_X4_NDX
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# define REG_X5 REG_X5_NDX
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# define REG_X6 REG_X6_NDX
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# define REG_X7 REG_X7_NDX
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# define REG_X8 REG_X8_NDX
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# define REG_X9 REG_X9_NDX
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# define REG_X10 REG_X10_NDX
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# define REG_X11 REG_X11_NDX
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# define REG_X12 REG_X12_NDX
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# define REG_X13 REG_X13_NDX
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# define REG_X14 REG_X14_NDX
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# define REG_X15 REG_X15_NDX
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# define REG_X16 REG_X16_NDX
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# define REG_X17 REG_X17_NDX
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# define REG_X18 REG_X18_NDX
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# define REG_X19 REG_X19_NDX
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# define REG_X20 REG_X20_NDX
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# define REG_X21 REG_X21_NDX
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# define REG_X22 REG_X22_NDX
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# define REG_X23 REG_X23_NDX
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# define REG_X24 REG_X24_NDX
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# define REG_X25 REG_X25_NDX
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# define REG_X26 REG_X26_NDX
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# define REG_X27 REG_X27_NDX
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# define REG_X28 REG_X28_NDX
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# define REG_X29 REG_X29_NDX
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# define REG_X30 REG_X30_NDX
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# define REG_X31 REG_X31_NDX
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# define REG_CSR_MSTATUS REG_CSR_MSTATUS_NDX
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# define REG_CSR_MEPC REG_CSR_MEPC_NDX
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# define REG_CSR_MBADADDR REG_CSR_MBADADDR_NDX
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# define REG_CSR_MCAUSE REG_CSR_MCAUSE_NDX
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#endif
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/* Now define more user friendly alternative name that can be used either
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* in assembly or C contexts.
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*/
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/* $1 = ra: Return address */
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#define REG_RA REG_X1
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/* $2 = sp: The value of the stack pointer on return from the exception */
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#define REG_SP REG_X2
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/* $3 = gp: Only needs to be saved under conditions where there are
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* multiple, per-thread values for the GP.
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*/
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#define REG_GP REG_X3
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/* $4 = tp: Thread Pointer */
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#define REG_TP REG_X4
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/* $5-$7 = t0-t2: Caller saved temporary registers */
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#define REG_T0 REG_X5
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#define REG_T1 REG_X6
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#define REG_T2 REG_X7
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/* $8 = either s0 or fp: Depends if a frame pointer is used or not */
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#define REG_S0 REG_X8
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#define REG_FP REG_X8
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/* $9 = s1: Caller saved register */
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#define REG_S1 REG_X9
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/* $10-$17 = a0-a7: Argument registers */
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#define REG_A0 REG_X10
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#define REG_A1 REG_X11
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#define REG_A2 REG_X12
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#define REG_A3 REG_X13
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#define REG_A4 REG_X14
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#define REG_A5 REG_X15
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#define REG_A6 REG_X16
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#define REG_A7 REG_X17
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/* $18-$27 = s2-s11: Callee saved registers */
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#define REG_S2 REG_X18
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#define REG_S3 REG_X19
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#define REG_S4 REG_X20
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#define REG_S5 REG_X21
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#define REG_S6 REG_X22
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#define REG_S7 REG_X23
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#define REG_S8 REG_X24
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#define REG_S9 REG_X25
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#define REG_S10 REG_X26
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#define REG_S11 REG_X27
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/* $28-$31 = t3-t6: Caller saved temporary registers */
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#define REG_T3 REG_X28
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#define REG_T4 REG_X29
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#define REG_T5 REG_X30
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#define REG_T6 REG_X31
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/****************************************************************************
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* Public Types
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****************************************************************************/
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#ifndef __ASSEMBLY__
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/* This structure represents the return state from a system call */
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#ifdef CONFIG_BUILD_KERNEL
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struct xcpt_syscall_s
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{
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uint32_t sysreturn; /* The return PC */
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};
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#endif
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/* The following structure is included in the TCB and defines the complete
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* state of the thread.
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*/
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struct xcptcontext
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{
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/* The following function pointer is non-NULL if there are pending signals
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* to be processed.
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*/
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void *sigdeliver; /* Actual type is sig_deliver_t */
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/* These additional register save locations are used to implement the
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* signal delivery trampoline.
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*/
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uint32_t saved_epc; /* Trampoline PC */
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uint32_t saved_int_ctx; /* Interrupt context with interrupts disabled. */
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#ifdef CONFIG_BUILD_KERNEL
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/* This is the saved address to use when returning from a user-space signal
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* handler.
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*/
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uint32_t sigreturn;
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#endif
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#ifdef CONFIG_BUILD_KERNEL
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/* The following array holds information needed to return from each nested
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* system call.
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*/
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uint8_t nsyscalls;
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struct xcpt_syscall_s syscall[CONFIG_SYS_NNEST];
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#endif
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/* Register save area */
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uint32_t regs[XCPTCONTEXT_REGS];
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};
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/****************************************************************************
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* Public Variables
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****************************************************************************/
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_RISCV_INCLUDE_RV32IM_IRQ_H */
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