7774cdd7aa
I skipped the following files because they were not simple. I'll create separate PRs. arch/xtensa/src/esp32/esp32_cpustart.c arch/xtensa/src/common/xtensa_abi.h boards/xtensa/esp32/esp32-core/include/board.h Also, I skipped the following files and directories because they looked too huge and/or foreign. arch/xtensa/include/esp32/tie.h arch/xtensa/include/xtensa/xtensa_corebits.h arch/xtensa/src/esp32/hardware/ arch/xtensa/include/esp32/tie-asm.h arch/xtensa/include/esp32/core-isa.h arch/xtensa/include/xtensa/core.h I also fixed a few "is is" style typos when unwrapping long lines.
313 lines
9.4 KiB
C
313 lines
9.4 KiB
C
/****************************************************************************
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* arch/xtensa/src/common/xtensa_cpupause.c
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*
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* Copyright (C) 2016 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <nuttx/arch.h>
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#include <nuttx/sched.h>
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#include <nuttx/spinlock.h>
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#include <nuttx/sched_note.h>
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#include "xtensa.h"
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#include "sched/sched.h"
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#ifdef CONFIG_SMP
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/****************************************************************************
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* Private Data
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****************************************************************************/
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static spinlock_t g_cpu_wait[CONFIG_SMP_NCPUS] SP_SECTION;
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static spinlock_t g_cpu_paused[CONFIG_SMP_NCPUS] SP_SECTION;
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: up_cpu_pausereq
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*
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* Description:
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* Return true if a pause request is pending for this CPU.
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*
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* Input Parameters:
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* cpu - The index of the CPU to be queried
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*
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* Returned Value:
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* true = a pause request is pending.
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* false = no pasue request is pending.
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*
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****************************************************************************/
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bool up_cpu_pausereq(int cpu)
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{
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return spin_islocked(&g_cpu_paused[cpu]);
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}
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/****************************************************************************
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* Name: up_cpu_paused
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*
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* Description:
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* Handle a pause request from another CPU. Normally, this logic is
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* executed from interrupt handling logic within the architecture-specific
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* However, it is sometimes necessary necessary to perform the pending
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* pause operation in other contexts where the interrupt cannot be taken
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* in order to avoid deadlocks.
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*
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* This function performs the following operations:
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*
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* 1. It saves the current task state at the head of the current assigned
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* task list.
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* 2. It waits on a spinlock, then
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* 3. Returns from interrupt, restoring the state of the new task at the
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* head of the ready to run list.
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*
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* Input Parameters:
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* cpu - The index of the CPU to be paused
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*
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* Returned Value:
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* On success, OK is returned. Otherwise, a negated errno value indicating
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* the nature of the failure is returned.
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*
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****************************************************************************/
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int up_cpu_paused(int cpu)
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{
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FAR struct tcb_s *tcb = this_task();
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/* Update scheduler parameters */
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sched_suspend_scheduler(tcb);
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#ifdef CONFIG_SCHED_INSTRUMENTATION
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/* Notify that we are paused */
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sched_note_cpu_paused(tcb);
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#endif
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/* Copy the CURRENT_REGS into the OLD TCB (otcb). The co-processor state
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* will be saved as part of the return from xtensa_irq_dispatch().
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*/
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xtensa_savestate(tcb->xcp.regs);
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/* Wait for the spinlock to be released */
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spin_unlock(&g_cpu_paused[cpu]);
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spin_lock(&g_cpu_wait[cpu]);
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/* Restore the exception context of the tcb at the (new) head of the
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* assigned task list.
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*/
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tcb = this_task();
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#ifdef CONFIG_SCHED_INSTRUMENTATION
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/* Notify that we have resumed */
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sched_note_cpu_resumed(tcb);
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#endif
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/* Reset scheduler parameters */
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sched_resume_scheduler(tcb);
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/* Then switch contexts. Any necessary address environment changes
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* will be made when the interrupt returns.
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*/
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xtensa_restorestate(tcb->xcp.regs);
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spin_unlock(&g_cpu_wait[cpu]);
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return OK;
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}
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/****************************************************************************
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* Name: xtensa_pause_handler
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*
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* Description:
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* This is the handler for CPU_INTCODE_PAUSE CPU interrupt. This
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* implements up_cpu_pause() by performing the following operations:
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*
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* 1. The current task state at the head of the current assigned task
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* list was saved when the interrupt was entered.
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* 2. This function simply waits on a spinlock, then returns.
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* 3. Upon return, the interrupt exit logic will restore the state of
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* the new task at the head of the ready to run list.
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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void xtensa_pause_handler(void)
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{
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int cpu = up_cpu_index();
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/* Check for false alarms. Such false could occur as a consequence of
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* some deadlock breaking logic that might have already serviced the SG2
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* interrupt by calling up_cpu_paused.
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*/
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if (spin_islocked(&g_cpu_paused[cpu]))
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{
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up_cpu_paused(cpu);
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}
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}
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/****************************************************************************
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* Name: up_cpu_pause
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*
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* Description:
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* Save the state of the current task at the head of the
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* g_assignedtasks[cpu] task list and then pause task execution on the
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* CPU.
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*
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* This function is called by the OS when the logic executing on one CPU
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* needs to modify the state of the g_assignedtasks[cpu] list for another
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* CPU.
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*
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* Input Parameters:
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* cpu - The index of the CPU to be stopped.
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*
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* Returned Value:
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* Zero on success; a negated errno value on failure.
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*
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****************************************************************************/
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int up_cpu_pause(int cpu)
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{
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int ret;
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#ifdef CONFIG_SCHED_INSTRUMENTATION
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/* Notify of the pause event */
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sched_note_cpu_pause(this_task(), cpu);
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#endif
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DEBUGASSERT(cpu >= 0 && cpu < CONFIG_SMP_NCPUS && cpu != this_cpu());
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/* Take the both spinlocks. The g_cpu_wait spinlock will prevent the SGI2
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* handler from returning until up_cpu_resume() is called; g_cpu_paused
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* is a handshake that will prefent this function from returning until
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* the CPU is actually paused.
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*/
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DEBUGASSERT(!spin_islocked(&g_cpu_wait[cpu]) &&
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!spin_islocked(&g_cpu_paused[cpu]));
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spin_lock(&g_cpu_wait[cpu]);
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spin_lock(&g_cpu_paused[cpu]);
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/* Execute SGI2 */
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ret = xtensa_intercpu_interrupt(cpu, CPU_INTCODE_PAUSE);
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if (ret < 0)
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{
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/* What happened? Unlock the g_cpu_wait spinlock */
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spin_unlock(&g_cpu_wait[cpu]);
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}
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else
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{
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/* Wait for the other CPU to unlock g_cpu_paused meaning that
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* it is fully paused and ready for up_cpu_resume();
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*/
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spin_lock(&g_cpu_paused[cpu]);
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}
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spin_unlock(&g_cpu_paused[cpu]);
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/* On successful return g_cpu_wait will be locked, the other CPU will be
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* spinninf on g_cpu_wait and will not continue until g_cpu_resume() is
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* called. g_cpu_paused will be unlocked in any case.
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*/
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return ret;
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}
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/****************************************************************************
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* Name: up_cpu_resume
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*
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* Description:
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* Restart the cpu after it was paused via up_cpu_pause(), restoring the
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* state of the task at the head of the g_assignedtasks[cpu] list, and
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* resume normal tasking.
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*
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* This function is called after up_cpu_pause in order resume operation of
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* the CPU after modifying its g_assignedtasks[cpu] list.
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*
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* Input Parameters:
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* cpu - The index of the CPU being re-started.
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*
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* Returned Value:
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* Zero on success; a negated errno value on failure.
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*
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****************************************************************************/
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int up_cpu_resume(int cpu)
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{
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#ifdef CONFIG_SCHED_INSTRUMENTATION
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/* Notify of the resume event */
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sched_note_cpu_resume(this_task(), cpu);
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#endif
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DEBUGASSERT(cpu >= 0 && cpu < CONFIG_SMP_NCPUS && cpu != this_cpu());
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/* Release the spinlock. Releasing the spinlock will cause the SGI2
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* handler on 'cpu' to continue and return from interrupt to the newly
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* established thread.
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*/
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DEBUGASSERT(spin_islocked(&g_cpu_wait[cpu]) &&
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!spin_islocked(&g_cpu_paused[cpu]));
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spin_unlock(&g_cpu_wait[cpu]);
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return OK;
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}
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#endif /* CONFIG_SMP */
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