4ec7af779d
When I try to set priorities in certain programs, such as init_priority(HIGH_PRIORITY), I've noticed that during linking, there's no guarantee that the programs will be compiled in the sequence I've specified based on priority. This has led to some runtime errors in my program. I realized that in the ld file, when initializing dynamic arrays, there's no assurance of initializing init_array.* before init_array. This has resulted in runtime errors in the program. Consequently, I've rearranged the init_array.* in the ld file of NuttX to be placed before init_array and added a SORT operation to init_array.* to ensure accurate initialization based on priorities during linking.
164 lines
4.7 KiB
Plaintext
164 lines
4.7 KiB
Plaintext
/****************************************************************************
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* boards/arm/s32k3xx/mr-canhubk3/scripts/flash.ld
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/* Copyright 2022 NXP */
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/* TO DO: ADD DESCRIPTION
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*
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* 0x00400000 - 0x007fffff 4194304 Program Flash (last 64K sBAF)
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* 0x10000000 - 0x1003ffff 262144 Data Flash (last 32K HSE_NVM)
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* 0x20400000 - 0x20408000 32768 Standby RAM_0 (32K)
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* 0x20400000 - 0x20427fff 163840 SRAM_0
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* 0x20428000 - 0x2044ffff 163840 SRAM_1
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*
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* Last 48 KB of SRAM_1 reserved by HSE Firmware
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* Last 128 KB of CODE_FLASH_3 reserved by HSE Firmware
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* Last 128 KB of DATA_FLASH reserved by HSE Firmware (not supported in this linker file)
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*
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* Note Standby RAM and SRAM overlaps in NuttX since we dont use the Standby functionality
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*
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*/
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MEMORY
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{
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BOOT_HEADER (R) : ORIGIN = 0x00400000, LENGTH = 0x00001000 /* 0x00400000 - 0x00400fff */
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flash (rx) : ORIGIN = 0x00401000, LENGTH = 0x003cffff /* 0x00401000 - (0x007fffff - 0x20000 (128 KB) = 0x007dffff) */
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sram0_stdby (rwx) : ORIGIN = 0x20400000, LENGTH = 32K
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sram (rwx) : ORIGIN = 0x20400000, LENGTH = 272K
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itcm (rwx) : ORIGIN = 0x00000000, LENGTH = 64K
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dtcm (rwx) : ORIGIN = 0x20000000, LENGTH = 128K
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}
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OUTPUT_ARCH(arm)
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EXTERN(_vectors)
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EXTERN(boot_header)
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ENTRY(_stext)
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SECTIONS
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{
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.boot_header :
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{
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KEEP(*(.boot_header))
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} > BOOT_HEADER
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.text :
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{
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_stext = ABSOLUTE(.);
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*(.vectors)
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*(.text.__start)
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*(.text .text.*)
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*(.fixup)
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*(.gnu.warning)
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*(.rodata .rodata.*)
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*(.gnu.linkonce.t.*)
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*(.glue_7)
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*(.glue_7t)
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*(.got)
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*(.gcc_except_table)
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*(.gnu.linkonce.r.*)
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_etext = ABSOLUTE(.);
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} > flash
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.init_section :
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{
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_sinit = ABSOLUTE(.);
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KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
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KEEP(*(.init_array .ctors))
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_einit = ABSOLUTE(.);
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} > flash
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.ARM.extab :
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{
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*(.ARM.extab*)
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} >flash
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.ARM.exidx :
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{
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__exidx_start = ABSOLUTE(.);
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*(.ARM.exidx*)
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__exidx_end = ABSOLUTE(.);
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} >flash
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/* Due ECC initialization sequence __data_start__ and __data_end__ should be aligned on 8 bytes */
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.data :
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{
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. = ALIGN(8);
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_sdata = ABSOLUTE(.);
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*(.data .data.*)
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*(.gnu.linkonce.d.*)
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CONSTRUCTORS
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. = ALIGN(8);
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_edata = ABSOLUTE(.);
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} > sram AT > flash
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_eronly = LOADADDR(.data);
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.ramfunc ALIGN(8):
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{
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_sramfuncs = ABSOLUTE(.);
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*(.ramfunc .ramfunc.*)
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_eramfuncs = ABSOLUTE(.);
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} > sram AT > flash
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_framfuncs = LOADADDR(.ramfunc);
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/* Due ECC initialization sequence __bss_start__ and __bss_end__ should be aligned on 8 bytes */
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.bss :
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{
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. = ALIGN(8);
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_sbss = ABSOLUTE(.);
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*(.bss .bss.*)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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. = ALIGN(8);
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_ebss = ABSOLUTE(.);
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} > sram
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CM7_0_START_ADDRESS = ORIGIN(flash);
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_info 0 : { *(.debug_info) }
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.debug_line 0 : { *(.debug_line) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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.debug_aranges 0 : { *(.debug_aranges) }
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SRAM_BASE_ADDR = ORIGIN(sram);
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SRAM_END_ADDR = ORIGIN(sram) + LENGTH(sram);
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SRAM_STDBY_BASE_ADDR = ORIGIN(sram0_stdby);
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SRAM_STDBY_END_ADDR = ORIGIN(sram0_stdby) + LENGTH(sram0_stdby);
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SRAM_INIT_END_ADDR = ORIGIN(sram) + 320K;
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ITCM_BASE_ADDR = ORIGIN(itcm);
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ITCM_END_ADDR = ORIGIN(itcm) + LENGTH(itcm);
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DTCM_BASE_ADDR = ORIGIN(dtcm);
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DTCM_END_ADDR = ORIGIN(dtcm) + LENGTH(dtcm);
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FLASH_BASE_ADDR = ORIGIN(BOOT_HEADER);
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FLASH_END_ADDR = ORIGIN(flash) + LENGTH(flash);
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}
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