105 lines
3.4 KiB
C
105 lines
3.4 KiB
C
/****************************************************************************
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* arch/arm/src/armv8-m/arm_memfault.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <assert.h>
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#include <debug.h>
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#include <inttypes.h>
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#include <arch/irq.h>
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#include "nvic.h"
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#include "arm_internal.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#ifdef CONFIG_DEBUG_MEMFAULT
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# define mfalert(format, ...) _alert(format, ##__VA_ARGS__)
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#else
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# define mfalert(x...)
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#endif
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: arm_memfault
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*
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* Description:
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* This is Memory Management Fault exception handler. Normally we get
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* here when the Cortex M3 MPU is enabled and an MPU fault is detected.
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* However, I understand that there are other error conditions that can
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* also generate memory management faults.
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*
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****************************************************************************/
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int arm_memfault(int irq, void *context, void *arg)
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{
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uint32_t cfsr = getreg32(NVIC_CFAULTS);
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/* Dump some memory management fault info */
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mfalert("PANIC!!! Memory Management Fault:\n");
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mfalert("\tIRQ: %d context: %p\n", irq, context);
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mfalert("\tCFSR: %08x MMFAR: %08x\n",
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getreg32(NVIC_CFAULTS), getreg32(NVIC_MEMMANAGE_ADDR));
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mfalert("\tBASEPRI: %08x PRIMASK: %08x IPSR: %08"
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PRIx32 " CONTROL: %08" PRIx32 "\n",
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getbasepri(), getprimask(), getipsr(), getcontrol());
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mfalert("Memory Management Fault Reason:\n");
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if (cfsr & NVIC_CFAULTS_IACCVIOL)
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{
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mfalert("\tInstruction access violation\n");
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}
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if (cfsr & NVIC_CFAULTS_DACCVIOL)
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{
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mfalert("\tData access violation\n");
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}
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if (cfsr & NVIC_CFAULTS_MUNSTKERR)
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{
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mfalert("\tMemManage fault on unstacking\n");
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}
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if (cfsr & NVIC_CFAULTS_MSTKERR)
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{
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mfalert("\tMemManage fault on stacking\n");
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}
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if (cfsr & NVIC_CFAULTS_MLSPERR)
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{
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mfalert("\tFloating-point lazy state preservation error\n");
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}
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up_irq_save();
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PANIC_WITH_REGS("panic", context);
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return OK; /* Won't get here */
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}
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