882c0d0a47
asm() is not supported by -std=c99, __asm__() is more portable Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
129 lines
3.9 KiB
C
129 lines
3.9 KiB
C
/****************************************************************************
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* arch/x86_64/src/intel64/intel64_tsc_timerisr.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <time.h>
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#include <debug.h>
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#include <nuttx/arch.h>
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#include <arch/irq.h>
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#include <arch/io.h>
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#include <arch/board/board.h>
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#include "clock/clock.h"
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#include "x86_64_internal.h"
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#include <stdio.h>
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#include "chip.h"
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#include "intel64.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define NS_PER_USEC 1000UL
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#define NS_PER_MSEC 1000000UL
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#define NS_PER_SEC 1000000000UL
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/****************************************************************************
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* Private Data
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****************************************************************************/
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unsigned long g_x86_64_timer_freq;
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Function: apic_timer_set
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*
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* Description:
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* Set a time for APIC timer to fire
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*
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****************************************************************************/
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void apic_timer_set(unsigned long timeout_ns)
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{
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unsigned long long ticks =
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(unsigned long long)timeout_ns * g_x86_64_timer_freq / NS_PER_SEC;
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#ifdef CONFIG_ARCH_INTEL64_TSC_DEADLINE
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write_msr(MSR_IA32_TSC_DEADLINE, rdtscp() + ticks);
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#else
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write_msr(MSR_X2APIC_TMICT, ticks);
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#endif
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}
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/****************************************************************************
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* Function: intel64_timerisr
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*
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* Description:
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* The timer ISR will perform a variety of services for various portions
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* of the systems.
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*
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****************************************************************************/
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static int intel64_timerisr(int irq, uint32_t *regs, void *arg)
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{
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/* Process timer interrupt */
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nxsched_process_timer();
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apic_timer_set(CONFIG_USEC_PER_TICK * NS_PER_USEC);
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return 0;
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Function: up_timer_initialize
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*
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* Description:
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* This function is called during start-up to initialize
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* the timer interrupt.
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*
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****************************************************************************/
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void up_timer_initialize(void)
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{
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uint32_t vector = IRQ0;
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irq_attach(IRQ0, (xcpt_t)intel64_timerisr, NULL);
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#ifdef CONFIG_ARCH_INTEL64_TSC_DEADLINE
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vector |= MSR_X2APIC_LVTT_TSC_DEADLINE;
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#endif
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write_msr(MSR_X2APIC_LVTT, vector);
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__asm__ volatile("mfence" : : : "memory");
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apic_timer_set(NS_PER_MSEC);
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}
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