nuttx/arch/arm/src/armv6-m
2013-04-16 18:00:59 -06:00
..
exc_return.h More Cortex-M0/NUC120 fixes 2013-02-25 18:36:25 +00:00
Kconfig Buildroot now builds armv6-m toolchain; NuTiny configuration now uses buildroot toolchain 2013-02-23 02:25:53 +00:00
nvic.h Correct some ARMv6-M NVIC addresses 2013-02-27 16:19:07 +00:00
psr.h
svcall.h Add support for calling to and returning from signal handlers in in user-mode threads 2013-03-17 00:40:49 +00:00
Toolchain.defs Use default optimization of -Os for all ARMv6-M tools 2013-04-08 18:34:16 -06:00
up_assert.c Fix major misthink in Cortex-M0 port: The Cortex-M0 has no BASEPRI register. We have to revert to using the nasty PRIMASK register 2013-04-16 18:00:59 -06:00
up_blocktask.c
up_copystate.c Fixes for NuTiny-NUC120 configuration and build 2013-02-23 15:04:49 +00:00
up_doirq.c
up_dumpnvic.c Correct some ARMv6-M NVIC addresses 2013-02-27 16:19:07 +00:00
up_elf.c
up_exception.S Fix major misthink in Cortex-M0 port: The Cortex-M0 has no BASEPRI register. We have to revert to using the nasty PRIMASK register 2013-04-16 18:00:59 -06:00
up_fullcontextrestore.S
up_hardfault.c Fix major misthink in Cortex-M0 port: The Cortex-M0 has no BASEPRI register. We have to revert to using the nasty PRIMASK register 2013-04-16 18:00:59 -06:00
up_initialstate.c Fix major misthink in Cortex-M0 port: The Cortex-M0 has no BASEPRI register. We have to revert to using the nasty PRIMASK register 2013-04-16 18:00:59 -06:00
up_releasepending.c
up_reprioritizertr.c Fixes for NuTiny-NUC120 configuration and build 2013-02-23 15:04:49 +00:00
up_saveusercontext.S
up_schedulesigaction.c Fix major misthink in Cortex-M0 port: The Cortex-M0 has no BASEPRI register. We have to revert to using the nasty PRIMASK register 2013-04-16 18:00:59 -06:00
up_sigdeliver.c Fix major misthink in Cortex-M0 port: The Cortex-M0 has no BASEPRI register. We have to revert to using the nasty PRIMASK register 2013-04-16 18:00:59 -06:00
up_signal_handler.S Rework of kernel build signal dispatch to user-space handlers 2013-03-23 14:46:02 +00:00
up_svcall.c Fix major misthink in Cortex-M0 port: The Cortex-M0 has no BASEPRI register. We have to revert to using the nasty PRIMASK register 2013-04-16 18:00:59 -06:00
up_switchcontext.S
up_systemreset.c
up_unblocktask.c
up_vectors.c
vfork.S Cortex-M0/NUC120 now passes OS test; calibration NuTiny-NUC120 delay loop 2013-02-26 20:53:21 +00:00