54e630e14d
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
319 lines
9.5 KiB
C
319 lines
9.5 KiB
C
/****************************************************************************
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* arch/arm/src/kl/kl_lowputc.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <assert.h>
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#include <arch/irq.h>
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#include <arch/board/board.h>
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#include "arm_internal.h"
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#include "kl_config.h"
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#include "kl_lowputc.h"
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#include "kl_gpio.h"
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#include "hardware/kl_uart.h"
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#include "hardware/kl_sim.h"
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#include "hardware/kl_port.h"
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#include "hardware/kl_uart.h"
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#include "hardware/kl_pinmux.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Select UART parameters for the selected console */
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#if defined(CONFIG_UART0_SERIAL_CONSOLE)
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# define CONSOLE_BASE KL_UART0_BASE
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# define CONSOLE_FREQ BOARD_CORECLK_FREQ
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# define CONSOLE_BAUD CONFIG_UART0_BAUD
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# define CONSOLE_BITS CONFIG_UART0_BITS
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# define CONSOLE_PARITY CONFIG_UART0_PARITY
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#elif defined(CONFIG_UART1_SERIAL_CONSOLE)
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# define CONSOLE_BASE KL_UART1_BASE
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# define CONSOLE_FREQ BOARD_BUSCLK_FREQ
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# define CONSOLE_BAUD CONFIG_UART1_BAUD
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# define CONSOLE_BITS CONFIG_UART1_BITS
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# define CONSOLE_PARITY CONFIG_UART1_PARITY
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#elif defined(CONFIG_UART2_SERIAL_CONSOLE)
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# define CONSOLE_BASE KL_UART2_BASE
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# define CONSOLE_FREQ BOARD_BUSCLK_FREQ
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# define CONSOLE_BAUD CONFIG_UART2_BAUD
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# define CONSOLE_BITS CONFIG_UART2_BITS
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# define CONSOLE_PARITY CONFIG_UART2_PARITY
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#endif
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#define OVER_SAMPLE 16
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/****************************************************************************
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* Private Types
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****************************************************************************/
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: arm_lowputc
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*
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* Description:
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* Output one byte on the serial console
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*
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****************************************************************************/
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void kl_lowputc(uint32_t ch)
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{
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#if defined HAVE_UART_DEVICE && defined HAVE_SERIAL_CONSOLE
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/* Wait until the transmit data register is "empty" (TDRE). This state
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* depends on the TX watermark setting and may not mean that the transmit
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* buffer is truly empty. It just means that we can now add another
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* characterto the transmit buffer without exceeding the watermark.
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*
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* NOTE: UART0 has an 8-byte deep FIFO; the other UARTs have no FIFOs
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* (1-deep). There appears to be no way to know when the FIFO is not
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* full (other than reading the FIFO length and comparing the FIFO count).
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* Hence, the FIFOs are not used in this implementation and, as a result
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* TDRE indeed mean that the single output buffer is available.
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*
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* Performance on UART0 could be improved by enabling the FIFO and by
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* redesigning all of the FIFO status logic.
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*/
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while ((getreg8(CONSOLE_BASE + KL_UART_S1_OFFSET) & UART_S1_TDRE) == 0);
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/* Then write the character to the UART data register */
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putreg8((uint8_t)ch, CONSOLE_BASE + KL_UART_D_OFFSET);
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#endif
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}
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/****************************************************************************
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* Name: kl_lowsetup
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*
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* Description:
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* This performs basic initialization of the UART used for the serial
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* console. Its purpose is to get the console output available as soon
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* as possible.
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*
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****************************************************************************/
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void kl_lowsetup(void)
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{
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uint32_t regval;
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uint8_t regval8;
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#if 0
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regval = getreg32(KL_SIM_SOPT2);
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regval |= SIM_SOPT2_PLLFLLSEL | SIM_SOPT2_UART0SRC_MCGCLK ;
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putreg32(regval, KL_SIM_SOPT2);
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#endif
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regval = getreg32(KL_SIM_SCGC4);
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#ifdef CONFIG_KL_UART0
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regval |= SIM_SCGC4_UART0;
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#endif
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#ifdef CONFIG_KL_UART1
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regval |= SIM_SCGC4_UART1;
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#endif
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#ifdef CONFIG_KL_UART2
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regval |= SIM_SCGC4_UART2;
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#endif
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putreg32(regval, KL_SIM_SCGC4);
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regval = getreg32(KL_SIM_SOPT2);
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regval &= ~(SIM_SOPT2_UART0SRC_MASK);
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putreg32(regval, KL_SIM_SOPT2);
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regval = getreg32(KL_SIM_SOPT2);
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regval |= SIM_SOPT2_UART0SRC_MCGCLK;
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putreg32(regval, KL_SIM_SOPT2);
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putreg32((PORT_PCR_MUX_ALT2), KL_PORTA_PCR1);
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putreg32((PORT_PCR_MUX_ALT2), KL_PORTA_PCR2);
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/* Disable UART before changing registers */
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putreg8(0, KL_UART0_C2);
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putreg8(0, KL_UART0_C1);
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putreg8(0, KL_UART0_C3);
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putreg8(0, KL_UART0_S2);
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/* Set the baud rate divisor */
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uint16_t divisor = (CONSOLE_FREQ / OVER_SAMPLE) / CONSOLE_BAUD;
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regval8 = OVER_SAMPLE - 1;
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putreg8(regval8, KL_UART0_C4);
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regval8 = (divisor >> 8) & UART_BDH_SBR_MASK;
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putreg8(regval8, KL_UART0_BDH);
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regval8 = (divisor & UART_BDL_SBR_MASK);
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putreg8(regval8, KL_UART0_BDL);
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/* Enable UART before changing registers */
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regval8 = getreg8(KL_UART0_C2);
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regval8 |= (UART_C2_RE | UART_C2_TE);
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putreg8(regval8, KL_UART0_C2);
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/* Configure the console (only) now. Other UARTs will be configured
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* when the serial driver is opened.
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*/
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#if defined(HAVE_SERIAL_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
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kl_uartconfigure(CONSOLE_BASE, CONSOLE_BAUD, CONSOLE_FREQ,
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CONSOLE_PARITY, CONSOLE_BITS);
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#endif
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}
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/****************************************************************************
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* Name: kl_uartreset
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*
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* Description:
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* Reset a UART.
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*
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****************************************************************************/
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#ifdef HAVE_UART_DEVICE
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void kl_uartreset(uintptr_t uart_base)
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{
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uint8_t regval;
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/* Just disable the transmitter and receiver */
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regval = getreg8(uart_base + KL_UART_C2_OFFSET);
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regval &= ~(UART_C2_RE | UART_C2_TE);
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putreg8(regval, uart_base + KL_UART_C2_OFFSET);
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}
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#endif
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/****************************************************************************
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* Name: kl_uartconfigure
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*
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* Description:
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* Configure a UART as a RS-232 UART.
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*
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****************************************************************************/
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#ifdef HAVE_UART_DEVICE
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void kl_uartconfigure(uintptr_t uart_base, uint32_t baud, uint32_t clock,
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unsigned int parity, unsigned int nbits)
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{
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uint32_t sbr;
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uint32_t tmp;
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uint8_t regval;
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/* Disable the transmitter and receiver throughout the reconfiguration */
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regval = getreg8(uart_base + KL_UART_C2_OFFSET);
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regval &= ~(UART_C2_RE | UART_C2_TE);
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putreg8(regval, uart_base + KL_UART_C2_OFFSET);
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/* Configure number of bits, stop bits and parity */
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regval = 0;
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/* Check for odd parity */
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if (parity == 1)
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{
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regval |= (UART_C1_PE | UART_C1_PT); /* Enable + odd parity type */
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}
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/* Check for even parity */
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else if (parity == 2)
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{
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regval |= UART_C1_PE; /* Enable (even parity default) */
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}
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/* The only other option is no parity */
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else
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{
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DEBUGASSERT(parity == 0);
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}
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/* Check for 9-bit operation */
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if (nbits == 9)
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{
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regval |= UART_C1_M;
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}
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/* The only other option is 8-bit operation */
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else
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{
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DEBUGASSERT(nbits == 8);
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}
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putreg8(regval, uart_base + KL_UART_C1_OFFSET);
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/* Calculate baud settings (truncating) */
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sbr = clock / (baud << 4);
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DEBUGASSERT(sbr < 0x2000);
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/* Save the new baud divisor, retaining other bits in the UARTx_BDH
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* register.
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*/
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regval = getreg8(uart_base + KL_UART_BDH_OFFSET) & UART_BDH_SBR_MASK;
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tmp = sbr >> 8;
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regval |= (((uint8_t)tmp) << UART_BDH_SBR_SHIFT) & UART_BDH_SBR_MASK;
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putreg8(regval, uart_base + KL_UART_BDH_OFFSET);
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regval = sbr & 0xff;
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putreg8(regval, uart_base + KL_UART_BDL_OFFSET);
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/* Now we can (re-)enable the transmitter and receiver */
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regval = getreg8(uart_base + KL_UART_C2_OFFSET);
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regval |= (UART_C2_RE | UART_C2_TE);
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putreg8(regval, uart_base + KL_UART_C2_OFFSET);
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}
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#endif
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