Huang Qi 10bb48b9b4 arch/risc-v: Merge rv32im and rv64gc into common ...

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>

2022-01-11 23:24:33 +08:00

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elf

arch/risc-v: Merge rv32im and rv64gc into common

2022-01-11 23:24:33 +08:00

fpu

arch/risc-v: Merge rv32im and rv64gc into common

2022-01-11 23:24:33 +08:00

gpio

arch/risc-v: Merge rv32im and rv64gc into common

2022-01-11 23:24:33 +08:00

i2c

arch/risc-v: Merge rv32im and rv64gc into common

2022-01-11 23:24:33 +08:00

nsh

arch/risc-v: Merge rv32im and rv64gc into common

2022-01-11 23:24:33 +08:00

spi

arch/risc-v: Merge rv32im and rv64gc into common

2022-01-11 23:24:33 +08:00

spiflash

arch/risc-v: Merge rv32im and rv64gc into common

2022-01-11 23:24:33 +08:00

timer

arch/risc-v: Merge rv32im and rv64gc into common

2022-01-11 23:24:33 +08:00

wifi

arch/risc-v: Merge rv32im and rv64gc into common

2022-01-11 23:24:33 +08:00