50321df42d
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5146 42af7a65-404d-4744-a932-0658087f49c3
133 lines
6.7 KiB
C
133 lines
6.7 KiB
C
/************************************************************************************************
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* arch/arm/src/lpc31xx/lpc31_adc.h
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*
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* Copyright (C) 2009-2010 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************************/
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#ifndef __ARCH_ARM_SRC_LPC31XX_LPC31_ADC_H
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#define __ARCH_ARM_SRC_LPC31XX_LPC31_ADC_H
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/************************************************************************************************
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* Included Files
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************************************************************************************************/
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#include <nuttx/config.h>
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#include "lpc31_memorymap.h"
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/************************************************************************************************
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* Pre-processor Definitions
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************************************************************************************************/
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/* ADC register base address offset into the APB0 domain ****************************************/
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#define LPC31_ADC_VBASE (LPC31_APB0_VADDR+LPC31_APB0_ADC_OFFSET)
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#define LPC31_ADC_PBASE (LPC31_APB0_PADDR+LPC31_APB0_ADC_OFFSET)
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/* ADC register offsets (with respect to the ADC base) ******************************************/
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#define LPC31_ADC_R0_OFFSET 0x000 /* Data for analog input channel 0 */
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#define LPC31_ADC_R1_OFFSET 0x004 /* Data for analog input channel 1 */
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#define LPC31_ADC_R2_OFFSET 0x008 /* Data for analog input channel 2 */
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#define LPC31_ADC_R3_OFFSET 0x00c /* Data for analog input channel 3 */
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/* 0x010-0x01c: Reserved */
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#define LPC31_ADC_CON_OFFSET 0x020 /* ADC control register */
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#define LPC31_ADC_CSEL_OFFSET 0x024 /* Configure and select analog input channels */
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#define LPC31_ADC_INTEN_OFFSET 0x028 /* Enable ADC interrupts */
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#define LPC31_ADC_INTST_OFFSET 0x02C /* ADC interrupt status */
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#define LPC31_ADC_INTCLR_OFFSET 0x030 /* Clear ADC interrupt status */
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/* 0x034-: Reserved */
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/* ADC register (virtual) addresses *************************************************************/
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#define LPC31_ADC_R0 (LPC31_ADC_VBASE+LPC31_ADC_R0_OFFSET)
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#define LPC31_ADC_R1 (LPC31_ADC_VBASE+LPC31_ADC_R1_OFFSET)
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#define LPC31_ADC_R2 (LPC31_ADC_VBASE+LPC31_ADC_R2_OFFSET)
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#define LPC31_ADC_R3 (LPC31_ADC_VBASE+LPC31_ADC_R3_OFFSET)
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#define LPC31_ADC_CON (LPC31_ADC_VBASE+LPC31_ADC_CON_OFFSET)
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#define LPC31_ADC_CSEL (LPC31_ADC_VBASE+LPC31_ADC_CSEL_OFFSET)
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#define LPC31_ADC_INTEN (LPC31_ADC_VBASE+LPC31_ADC_INTEN_OFFSET)
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#define LPC31_ADC_INTST (LPC31_ADC_VBASE+LPC31_ADC_INTST_OFFSET)
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#define LPC31_ADC_INTCLR (LPC31_ADC_VBASE+LPC31_ADC_INTCLR_OFFSET)
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/* ADC register bit definitions *****************************************************************/
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/* ADC_Rx (ADC_R0, address 0x13002000; ADC_R1, address 0x13002004, ADC_R2, address 0x13002008;
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* ADC_R3, address 0x1300200c)
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*/
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#define ADC_RX_SHIFT (0) /* Bits 0-9: Digital conversion data */
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#define ADC_RX_MASK (0x3ff << ADC_RX_SHIFT)
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/* ADC_CON, address 0x13002020 */
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#define ADC_CON_STATUS (1 << 4) /* Bit 4: ADC Status */
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#define ADC_CON_START (1 << 3) /* Bit 3: Start command */
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#define ADC_CON_CSCAN (1 << 2) /* Bit 2: Continuous scan */
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#define ADC_CON_ENABLE (1 << 1) /* Bit 1: ADC enable */
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/* ADC_CSEL, address 0x13002024 */
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#define ADC_CSEL_CHAN3_SHIFT (12) /* Bits 12-15: Select and configure channel 3*/
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#define ADC_CSEL_CHAN3_MASK (15 << ADC_CSEL_CHAN3_SHIFT)
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#define ADC_CSEL_CHAN2_SHIFT (8) /* Bits 8-10: Select and configure channel 2*/
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#define ADC_CSEL_CHAN2_MASK (15 << ADC_CSEL_CHAN2_SHIFT)
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#define ADC_CSEL_CHAN1_SHIFT (4) /* Bits 4-7: Select and configure channel 1*/
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#define ADC_CSEL_CHAN1_MASK (15 << ADC_CSEL_CHAN1_SHIFT)
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#define ADC_CSEL_CHAN0_SHIFT (0) /* Bits 0-3: Select and configure channel 0*/
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#define ADC_CSEL_CHAN0_MASK (15 << ADC_CSEL_CHAN0_SHIFT)
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/* ADC_INTEN, address 0x13002028 */
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#define ADC_INTEN_ENABLE (1 << 0)
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/* ADC_INTST, address 0x1300202c */
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#define ADC_INTST_PENDING (1 << 0)
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/* ADC_INTCLR, address 0x13002030 */
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#define ADC_INTCLR_CLEAR (1 << 0)
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/************************************************************************************************
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* Public Types
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************************************************************************************************/
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/************************************************************************************************
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* Public Data
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************************************************************************************************/
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/************************************************************************************************
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* Public Functions
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************************************************************************************************/
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#endif /* __ARCH_ARM_SRC_LPC31XX_LPC31_ADC_H */
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