446 lines
10 KiB
Plaintext
446 lines
10 KiB
Plaintext
#
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# For a description of the syntax of this configuration file,
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# see the file kconfig-language.txt in the NuttX tools repository.
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#
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if ARCH_CHIP_S32K1XX
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# Chip Selection
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choice
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prompt "S32K1XX Chip Selection"
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default ARCH_CHIP_S32K146
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config ARCH_CHIP_S32K116
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bool "S32K116"
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select ARCH_CHIP_S32K11X
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---help---
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Cortex-M0+, 128Kb FLASH, 17Kb RAM incl. 2Kb FlexRAM
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config ARCH_CHIP_S32K118
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bool "S32K118"
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select ARCH_CHIP_S32K11X
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select S32K1XX_HAVE_LPSPI1
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---help---
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Cortex-M0+, 256Kb FLASH, 25Kb RAM incl. 2Kb FlexRAM
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config ARCH_CHIP_S32K142
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bool "S32K142"
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select ARCH_CHIP_S32K14X
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---help---
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Cortex-M4F, 256Kb FLASH, 32Kb RAM incl. 4Kb FlexRAM
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config ARCH_CHIP_S32K144
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bool "S32K144"
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select ARCH_CHIP_S32K14X
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select S32K1XX_HAVE_LPSPI2
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---help---
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Cortex-M4F, 512Kb FLASH, 64Kb RAM incl. 4Kb FlexRAM
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config ARCH_CHIP_S32K146
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bool "S32K146"
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select ARCH_CHIP_S32K14X
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select S32K1XX_HAVE_LPSPI2
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---help---
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Cortex-M4F, 1Mb FLASH, 128Kb RAM incl. 4Kb FlexRAM
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config ARCH_CHIP_S32K148
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bool "S32K148"
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select ARCH_CHIP_S32K14X
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select S32K1XX_HAVE_ENET
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select S32K1XX_HAVE_LPI2C1
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select S32K1XX_HAVE_LPSPI2
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select S32K1XX_HAVE_SAI
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---help---
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Cortex-M4F, 2Mb FLASH, 256Kb RAM incl. 4Kb FlexRAM
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endchoice # S32K1XX Chip Selection
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# Chip Family
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config ARCH_CHIP_S32K11X
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bool
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select ARCH_CORTEXM0
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select S32K1XX_HAVE_FIRC_CMU
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config ARCH_CHIP_S32K14X
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bool
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select ARCH_CORTEXM4
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select ARCH_HAVE_FPU
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select ARCH_HAVE_FETCHADD
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select S32K1XX_HAVE_EWM
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select S32K1XX_HAVE_SPLL
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select S32K1XX_HAVE_HSRUN
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select S32K1XX_HAVE_LMEM
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select S32K1XX_HAVE_LPSPI1
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# Chip Capabilities
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config S32K1XX_HAVE_ENET
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bool
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default n
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config S32K1XX_HAVE_EWM
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bool
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default n
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config S32K1XX_HAVE_FIRC_CMU
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bool
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default n
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config S32K1XX_HAVE_HSRUN
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bool
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default n
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config S32K1XX_HAVE_LMEM
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bool
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default n
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config S32K1XX_HAVE_LPI2C1
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bool
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default n
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config S32K1XX_HAVE_LPSPI1
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bool
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default n
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config S32K1XX_HAVE_LPSPI2
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bool
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default n
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config S32K1XX_HAVE_QSPI
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bool
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default n
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config S32K1XX_HAVE_SAI
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bool
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default n
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config S32K1XX_HAVE_SPLL
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bool
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default n
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# Peripheral Group Selections
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config S32K1XX_LPUART
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bool
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default n
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config S32K1XX_LPI2C
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bool
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default n
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config S32K1XX_LPSPI
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bool
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default n
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# Peripheral Selection
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menu "S32K1XX Peripheral Selection"
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config S32K1XX_EDMA
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bool "eDMA"
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default n
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config S32K1XX_ENET
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bool "Ethernet"
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default n
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depends on S32K1XX_HAVE_ENET
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menuconfig S32K1XX_LPI2C0
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bool "LPI2C0"
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default n
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select S32K1XX_LPI2C
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menuconfig S32K1XX_LPI2C1
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bool "LPI2C1"
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default n
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select S32K1XX_LPI2C
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depends on S32K1XX_HAVE_LPI2C1
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config S32K1XX_LPSPI0
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bool "LPSPI0"
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default n
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select S32K1XX_LPSPI
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select SPI
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config S32K1XX_LPSPI1
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bool "LPSPI1"
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default n
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select S32K1XX_LPSPI
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select SPI
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depends on S32K1XX_HAVE_LPSPI1
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config S32K1XX_LPSPI2
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bool "LPSPI2"
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default n
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select S32K1XX_LPSPI
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select SPI
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depends on S32K1XX_HAVE_LPSPI2
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config S32K1XX_LPUART0
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bool "LPUART0"
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default n
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select S32K1XX_LPUART
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select LPUART0_SERIALDRIVER
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config S32K1XX_LPUART1
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bool "LPUART1"
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default n
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select S32K1XX_LPUART
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select LPUART1_SERIALDRIVER
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config S32K1XX_LPUART2
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bool "LPUART2"
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default n
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select S32K1XX_LPUART
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select LPUART2_SERIALDRIVER
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endmenu # S32K1XX Peripheral Selection
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config S32K1XX_WDT_DISABLE
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bool "Disable watchdog on reset"
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default y
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menu "S32K1xx GPIO Interrupt Configuration"
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config S32K1XX_GPIOIRQ
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bool "GPIO pin interrupts"
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---help---
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Enable support for interrupting GPIO pins
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if S32K1XX_GPIOIRQ
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config S32K1XX_PORTAINTS
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bool "GPIOA interrupts"
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---help---
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Enable support for 32 interrupts from GPIO port A pins
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config S32K1XX_PORTBINTS
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bool "GPIOB interrupts"
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---help---
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Enable support for 32 interrupts from GPIO port B pins
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config S32K1XX_PORTCINTS
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bool "GPIOC interrupts"
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---help---
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Enable support for 32 interrupts from GPIO port C pins
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config S32K1XX_PORTDINTS
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bool "GPIOD interrupts"
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---help---
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Enable support for 32 interrupts from GPIO port D pins
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config S32K1XX_PORTEINTS
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bool "GPIOE interrupts"
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---help---
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Enable support for 32 interrupts from GPIO port E pins
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endif
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endmenu # S32K1xx GPIO Interrupt Configuration
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menu "S32K1xx FLASH Configuration"
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comment "CAREFUL: Bad selections may lock up your board"
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config S32K1XX_FLASHCFG_BACKDOOR1
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hex "Backdoor comparison key 1"
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default 0xffffffff
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---help---
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Refer to the S32K1xx reference manual for a description of the
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backdoor key. This option selects the first 32-bit word in
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memory.
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config S32K1XX_FLASHCFG_BACKDOOR2
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hex "Backdoor comparison key 2"
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default 0xffffffff
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---help---
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Refer to the S32K1xx reference manual for a description of the
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backdoor key. This option selects the second 32-bit word in
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memory
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config S32K1XX_FLASHCFG_FPROT
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hex "Program flash protection bytes"
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default 0xffffffff
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---help---
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Refer to the S32K1xx reference manual or to hardware/s32k1xx_flashcfg.h
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for a description of the FPROT bitfields.
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config S32K1XX_FLASHCFG_FSEC
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hex "Flash security byte"
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default 0xff
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---help---
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Refer to the S32K1xx reference manual or to hardware/s32k1xx_flashcfg.h
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for a description of the FSEC bitfields.
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config S32K1XX_FLASHCFG_FOPT
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hex "Flash nonvolatile option byte"
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default 0xff
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---help---
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Refer to the S32K1xx reference manual or to hardware/s32k1xx_flashcfg.h
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for a description of the FOPT bitfields.
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config S32K1XX_FLASHCFG_FEPROT
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hex "EEPROM protection byte"
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default 0xff
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---help---
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Refer to the S32K1xx reference manual or to hardware/s32k1xx_flashcfg.h
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for a description of the FEPROT bitfields.
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config S32K1XX_FLASHCFG_FDPROT
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hex "Data flash protection byte"
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default 0xff
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---help---
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Refer to the S32K1xx reference manual or to hardware/s32k1xx_flashcfg.h
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for a description of the FDPROT bitfields.
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endmenu # S32K1xx FLASH Configuration
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menu "eDMA Configuration"
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depends on S32K1XX_EDMA
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config S32K1XX_EDMA_NTCD
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int "Number of transfer descriptors"
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default 0
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---help---
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Number of pre-allocated transfer descriptors. Needed for scatter-
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gather DMA. Make to be set to zero to disable in-memory TCDs in
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which case only the TCD channel registers will be used and scatter-
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will not be supported.
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config S32K1XX_EDMA_ELINK
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bool "Channeling Linking"
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default n
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---help---
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This option enables optional minor or major loop channel linking:
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Minor loop channel linking: As the channel completes the minor
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loop, this flag enables linking to another channel. The link target
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channel initiates a channel service request via an internal
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mechanism that sets the TCDn_CSR[START] bit of the specified
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channel.
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If minor loop channel linking is disabled, this link mechanism is
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suppressed in favor of the major loop channel linking.
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Major loop channel linking: As the channel completes the minor
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loop, this option enables the linking to another channel. The link
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target channel initiates a channel service request via an internal
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mechanism that sets the TCDn_CSR[START] bit of the linked channel.
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config S32K1XX_EDMA_ERCA
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bool "Round Robin Channel Arbitration"
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default n
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---help---
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Normally, a fixed priority arbitration is used for channel
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selection. If this option is selected, round robin arbitration is
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used for channel selection.
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config S32K1XX_EDMA_HOE
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bool "Halt On Error"
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default y
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---help---
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Any error causes the HALT bit to set. Subsequently, all service
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requests are ignored until the HALT bit is cleared.
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config S32K1XX_EDMA_CLM
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bool "Continuous Link Mode"
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default n
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---help---
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By default, A minor loop channel link made to itself goes through
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channel arbitration before being activated again. If this option is
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selected, a minor loop channel link made to itself does not go
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through channel arbitration before being activated again. Upon minor
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loop completion, the channel activates again if that channel has a
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minor loop channel link enabled and the link channel is itself. This
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effectively applies the minor loop offsets and restarts the next
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minor loop.
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config S32K1XX_EDMA_EMLIM
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bool "Minor Loop Mapping"
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default n
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---help---
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Normally TCD word 2 is a 32-bit NBYTES field. When this option is
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enabled, TCD word 2 is redefined to include individual enable fields,
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an offset field, and the NBYTES field. The individual enable fields
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allow the minor loop offset to be applied to the source address, the
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destination address, or both. The NBYTES field is reduced when either
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offset is enabled.
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config S32K1XX_EDMA_EDBG
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bool "Enable Debug"
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default n
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---help---
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When in debug mode, the DMA stalls the start of a new channel. Executing
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channels are allowed to complete. Channel execution resumes when the
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system exits debug mode or the EDBG bit is cleared
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endmenu # eDMA Global Configuration
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menu "LPI2C0 Configuration"
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depends on S32K1XX_LPI2C0
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config LPI2C0_BUSYIDLE
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int "Bus idle timeout period in clock cycles"
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default 0
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config LPI2C0_FILTSCL
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int "I2C master digital glitch filters for SCL input in clock cycles"
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default 0
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config LPI2C0_FILTSDA
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int "I2C master digital glitch filters for SDA input in clock cycles"
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default 0
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endmenu # LPI2C0 Configuration
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menu "LPI2C1 Configuration"
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depends on S32K1XX_LPI2C1
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config LPI2C1_BUSYIDLE
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int "Bus idle timeout period in clock cycles"
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default 0
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config LPI2C1_FILTSCL
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int "I2C master digital glitch filters for SCL input in clock cycles"
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default 0
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config LPI2C1_FILTSDA
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int "I2C master digital glitch filters for SDA input in clock cycles"
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default 0
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endmenu # LPI2C1 Configuration
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menu "Ethernet Configuration"
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depends on S32K1XX_ENET
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config MXRT_ENET_NRXBUFFERS
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int "Number Rx buffers"
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default 6
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config S32K1XX_ENET_NTXBUFFERS
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int "Number Tx buffers"
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default 2
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config S32K1XX_ENET_ENHANCEDBD
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bool # not optional
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default n
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config S32K1XX_ENET_NETHIFS
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int # Not optional
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default 1
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config S32K1XX_ENET_PHYINIT
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bool "Board-specific PHY Initialization"
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default n
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---help---
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Some boards require specialized initialization of the PHY before it
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can be used. This may include such things as configuring GPIOs,
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resetting the PHY, etc. If CONFIG_S32K1XX_ENET_PHYINIT is defined in
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the configuration then the board specific logic must provide
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imxrt_phy_boardinitialize(); The i.MXRT ENET driver will call this
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function one time before it first uses the PHY.
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endmenu # S32K1XX_ENET
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endif # ARCH_CHIP_S32K1XX
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