191 lines
5.2 KiB
Plaintext
191 lines
5.2 KiB
Plaintext
############################################################################
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# arch/arm/src/lpc17xx_40xx/Make.defs
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#
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# Copyright (C) 2010-2011, 2013-2015, 2018 Gregory Nutt. All rights reserved.
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# Author: Gregory Nutt <gnutt@nuttx.org>
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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#
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# 1. Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# 2. Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in
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# the documentation and/or other materials provided with the
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# distribution.
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# 3. Neither the name NuttX nor the names of its contributors may be
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# used to endorse or promote products derived from this software
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# without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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# POSSIBILITY OF SUCH DAMAGE.
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#
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############################################################################
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# The start-up, "head", file
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HEAD_ASRC =
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# Common ARM and Cortex-M3 files
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CMN_UASRCS =
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CMN_UCSRCS =
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CMN_ASRCS = up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S
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CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
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ifeq ($(CONFIG_ARCH_SETJMP_H),y)
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ifeq ($(CONFIG_ARCH_TOOLCHAIN_GNU),y)
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CMN_ASRCS += up_setjmp.S
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endif
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endif
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CMN_CSRCS = up_assert.c up_blocktask.c up_copyfullstate.c up_createstack.c
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CMN_CSRCS += up_mdelay.c up_udelay.c up_exit.c up_initialize.c up_memfault.c
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CMN_CSRCS += up_initialstate.c up_interruptcontext.c up_modifyreg8.c
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CMN_CSRCS += up_modifyreg16.c up_modifyreg32.c up_releasepending.c
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CMN_CSRCS += up_releasestack.c up_reprioritizertr.c up_schedulesigaction.c
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CMN_CSRCS += up_sigdeliver.c up_stackframe.c up_trigger_irq.c
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CMN_CSRCS += up_unblocktask.c up_usestack.c up_doirq.c up_hardfault.c
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CMN_CSRCS += up_svcall.c up_checkstack.c up_vfork.c
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CMN_CSRCS += up_systemreset.c
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ifeq ($(CONFIG_ARMV7M_STACKCHECK),y)
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CMN_CSRCS += up_stackcheck.c
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endif
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ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
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CMN_ASRCS += up_lazyexception.S
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else
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CMN_ASRCS += up_exception.S
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endif
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CMN_CSRCS += up_vectors.c
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ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
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CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
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endif
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ifeq ($(CONFIG_BUILD_PROTECTED),y)
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CMN_CSRCS += up_mpu.c up_task_start.c up_pthread_start.c
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CMN_CSRCS += up_signal_dispatch.c
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CMN_UASRCS += up_signal_handler.S
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endif
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# Use of common/up_etherstub.c is deprecated. The preferred mechanism is to
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# use CONFIG_NETDEV_LATEINIT=y to suppress the call to up_netinitialize() in
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# up_initialize(). Then this stub would not be needed.
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ifeq ($(CONFIG_NET),y)
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ifneq ($(CONFIG_LPC17_40_ETHERNET),y)
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CMN_CSRCS += up_etherstub.c
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endif
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endif
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ifeq ($(CONFIG_ARCH_FPU),y)
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CMN_ASRCS += up_fpu.S
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CMN_CSRCS += up_copyarmstate.c
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endif
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# Required LPC17xx files
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CHIP_ASRCS =
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CHIP_CSRCS = lpc17_40_allocateheap.c lpc17_40_clockconfig.c lpc17_40_clrpend.c
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CHIP_CSRCS += lpc17_40_gpio.c lpc17_40_i2c.c lpc17_40_irq.c lpc17_40_lowputc.c
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CHIP_CSRCS += lpc17_40_serial.c lpc17_40_spi.c lpc17_40_ssp.c lpc17_40_start.c
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# Configuration-dependent LPC17xx files
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ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
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CHIP_CSRCS += lpc17_40_idle.c
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endif
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ifneq ($(CONFIG_SCHED_TICKLESS),y)
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CHIP_CSRCS += lpc17_40_timerisr.c
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endif
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ifeq ($(CONFIG_BUILD_PROTECTED),y)
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CHIP_CSRCS += lpc17_40_userspace.c lpc17_40_mpuinit.c
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endif
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ifeq ($(CONFIG_LPC17_40_EMC),y)
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CHIP_CSRCS += lpc17_40_emc.c
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endif
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ifeq ($(CONFIG_LPC17_40_GPIOIRQ),y)
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CHIP_CSRCS += lpc17_40_gpioint.c
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endif
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ifeq ($(CONFIG_DEBUG_GPIO_INFO),y)
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CHIP_CSRCS += lpc17_40_gpiodbg.c
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endif
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ifeq ($(CONFIG_LPC17_40_LCD),y)
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CHIP_CSRCS += lpc17_40_lcd.c
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endif
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ifeq ($(CONFIG_USBDEV),y)
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CHIP_CSRCS += lpc17_40_usbdev.c
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endif
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ifeq ($(CONFIG_USBHOST),y)
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CHIP_CSRCS += lpc17_40_usbhost.c
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endif
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ifeq ($(CONFIG_LPC17_40_GPDMA),y)
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CHIP_CSRCS += lpc17_40_gpdma.c
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endif
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ifeq ($(CONFIG_LPC17_40_SDCARD),y)
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CHIP_CSRCS += lpc17_40_sdcard.c
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endif
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ifeq ($(CONFIG_NET),y)
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ifeq ($(CONFIG_LPC17_40_ETHERNET),y)
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CHIP_CSRCS += lpc17_40_ethernet.c
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endif
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endif
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ifeq ($(CONFIG_CAN),y)
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CHIP_CSRCS += lpc17_40_can.c
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endif
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ifeq ($(CONFIG_LPC17_40_ADC),y)
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CHIP_CSRCS += lpc17_40_adc.c
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endif
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ifeq ($(CONFIG_LPC17_40_DAC),y)
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CHIP_CSRCS += lpc17_40_dac.c
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endif
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ifeq ($(CONFIG_LPC17_40_RTC),y)
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CHIP_CSRCS += lpc176x_rtc.c
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endif
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ifeq ($(CONFIG_LPC17_40_PWM1),y)
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CHIP_CSRCS += lpc17_40_pwm.c
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endif
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ifeq ($(CONFIG_LPC17_40_MCPWM),y)
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CHIP_CSRCS += lpc17_40_mcpwm.c
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endif
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ifeq ($(CONFIG_LPC17_40_TMR0),y)
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CHIP_CSRCS += lpc17_40_timer.c
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endif
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ifeq ($(CONFIG_MTD_PROGMEM),y)
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CHIP_CSRCS += lpc17_40_progmem.c
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endif
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