e5dfd805e6
Add support for LPC40xx family chips
* Corrected a few peripheral definitions and pin functions for the LPC17xx family.
Added configuration options, chip definitions, and additional pin functions for the LPC40xx family.
Added board configurations for Embedded Artists LPC4088 Quickstart board and LPC4088 Developer's kit. These configurations are still something of a work in progress. In particular, the LCD functionality is untested.
* First pass rename in *.c and *.h files.
* Renamed LPC17XX to LPC17XX_40XX in config files
* Rplaced LPC17xx with LPC17xx/LPC40xx in .c files
* Replaced LPC17xx with LPC17xx/LPC40xx in .h files
* Updated some documentation
* Working on moving directories
* moved arch/arm/src/lpc17xx and arch/arm/include/lpc17xx to lpc17xx_40xx
* Renamed LPC17_* constants / configuration options to LPC17_40_*
* Updated chip family name defines
* Renamed some chip-specific files
* Updated references to renamed files
* Updated references to lpc17_ to lpc17_40_
* Renamed source files from lpc17_* to lpc17_40_*
* Clean up white space
Approved-by: Gregory Nutt <gnutt@nuttx.org>
226 lines
10 KiB
C
226 lines
10 KiB
C
/************************************************************************************
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* arch/arm/src/lpc17xx_40xx/lpc178x_40xx_gpio.h
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*
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* Copyright (C) 2010, 2013 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_LPC17XX_40XX_LPC178X_GPIO_H
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#define __ARCH_ARM_SRC_LPC17XX_40XX_LPC178X_GPIO_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Bit-encoded input to lpc17_40_configgpio() ******************************************/
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/* Encoding: TTTT TTTT FFFF MMOV PPPN NNNN
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*
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* Special Pin Functions: TTTT TTTT
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* Pin Function: FFFF
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* Pin Mode bits: MM
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* Open drain: O (output pins)
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* Initial value: V (output pins)
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* Port number: PPP (0-4)
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* Pin number: NNNNN (0-31)
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*/
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/* Special Pin Functions
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* For pins that have ADC/DAC, USB, I2C
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*/
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#define GPIO_INBUFF_SHIFT (16) /* Bit 16: HYSTERESIS: 0-Disable, 1-Enabled */
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#define GPIO_INBUFF_MASK (1 << GPIO_INBUFF_SHIFT)
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# define GPIO_HYSTERESIS (1 << GPIO_INBUFF_SHIFT)
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#define GPIO_INVERT (1 << 17) /* Bit 17: Input: 0-Not Inverted, 1-Inverted */
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#define GPIO_SLEW_SHIFT (18) /* Bit 18: Rate Control: 0-Standard mode, 1-Fast mode */
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#define GPIO_SLEW_MASK (1 << GPIO_SLEW_SHIFT)
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# define GPIO_SLEW_NORMAL (0 << GPIO_SLEW_SHIFT)
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# define GPIO_SLEW_FAST (1 << GPIO_SLEW_SHIFT)
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#define GPIO_ADMODE_SHIFT (19) /* Bit 19: A/D Modes: 0-Analog, 1-Digital */
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#define GPIO_ADMODE_MASK (1 << GPIO_ADMODE_SHIFT)
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# define GPIO_MODE_DIGITAL (0 << GPIO_ADMODE_SHIFT)
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# define GPIO_MODE_ANALOG (1 << GPIO_ADMODE_SHIFT)
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#define GPIO_FILTER_SHIFT (20) /* Bit 20: Filter: 0-Off, 1-ON */
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#define GPIO_FILTER_MASK (1 << GPIO_FILTER_SHIFT)
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# define GPIO_FILTER_OFF (0 << GPIO_FILTER_SHIFT)
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# define GPIO_FILTER_ON (1 << GPIO_FILTER_SHIFT)
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#define GPIO_DACEN (1 << 21) /* Bit 21: DAC: 0-Disabled, 1-Enabled, P0:26 only */
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#define GPIO_I2CMODE_SHIFT (22) /* Bits 22-23: I2C mode */
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#define GPIO_I2CMODE_MASK (3 << GPIO_I2CMODE_SHIFT)
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# define GPIO_I2CHS (1 << 22) /* Bit 22: Filter and Rate Control: 0-Enabled, 1-Disabled */
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# define GPIO_HIDRIVE (1 << 23) /* Bit 23: Current Sink: 0-4mA, 1-20mA P5:2 and P5:3 only,*/
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/* Pin Function bits: FFFF
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* Only meaningful when the GPIO function is GPIO_PIN
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*/
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#define GPIO_FUNC_SHIFT (12) /* Bits 12-15: GPIO mode */
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#define GPIO_FUNC_MASK (15 << GPIO_FUNC_SHIFT)
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# define GPIO_INPUT (0 << GPIO_FUNC_SHIFT) /* 0000 GPIO input pin */
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# define GPIO_INTFE (1 << GPIO_FUNC_SHIFT) /* 0001 GPIO interrupt falling edge */
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# define GPIO_INTRE (2 << GPIO_FUNC_SHIFT) /* 0010 GPIO interrupt rising edge */
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# define GPIO_INTBOTH (3 << GPIO_FUNC_SHIFT) /* 0011 GPIO interrupt both edges */
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# define GPIO_OUTPUT (4 << GPIO_FUNC_SHIFT) /* 0100 GPIO outpout pin */
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# define GPIO_ALT1 (5 << GPIO_FUNC_SHIFT) /* 0101 Alternate function 1 */
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# define GPIO_ALT2 (6 << GPIO_FUNC_SHIFT) /* 0110 Alternate function 2 */
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# define GPIO_ALT3 (7 << GPIO_FUNC_SHIFT) /* 0111 Alternate function 3 */
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# define GPIO_ALT4 (8 << GPIO_FUNC_SHIFT) /* 1000 Alternate function 4 */
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# define GPIO_ALT5 (9 << GPIO_FUNC_SHIFT) /* 1001 Alternate function 5 */
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# define GPIO_ALT6 (10 << GPIO_FUNC_SHIFT) /* 1010 Alternate function 6 */
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# define GPIO_ALT7 (11 << GPIO_FUNC_SHIFT) /* 1011 Alternate function 7 */
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#define GPIO_EDGE_SHIFT (12) /* Bits 12-13: Interrupt edge bits */
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#define GPIO_EDGE_MASK (3 << GPIO_EDGE_SHIFT)
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#define GPIO_INOUT_MASK GPIO_OUTPUT
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#define GPIO_FE_MASK GPIO_INTFE
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#define GPIO_RE_MASK GPIO_INTRE
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#define GPIO_ISGPIO(ps) ((uint16_t(ps) & GPIO_FUNC_MASK) <= GPIO_OUTPUT)
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#define GPIO_ISALT(ps) ((uint16_t(ps) & GPIO_FUNC_MASK) > GPIO_OUTPUT)
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#define GPIO_ISINPUT(ps) (((ps) & GPIO_FUNC_MASK) == GPIO_INPUT)
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#define GPIO_ISOUTPUT(ps) (((ps) & GPIO_FUNC_MASK) == GPIO_OUTPUT)
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#define GPIO_ISINORINT(ps) (((ps) & GPIO_INOUT_MASK) == 0)
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#define GPIO_ISOUTORALT(ps) (((ps) & GPIO_INOUT_MASK) != 0)
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#define GPIO_ISINTERRUPT(ps) (GPIO_ISOUTPUT(ps) && !GPIO_ISINPUT(ps))
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#define GPIO_ISFE(ps) (((ps) & GPIO_FE_MASK) != 0)
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#define GPIO_ISRE(ps) (((ps) & GPIO_RE_MASK) != 0)
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/* Pin Mode: MM */
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#define GPIO_PUMODE_SHIFT (10) /* Bits 10-11: Pin pull-up mode */
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#define GPIO_PUMODE_MASK (3 << GPIO_PUMODE_SHIFT)
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# define GPIO_FLOAT (0 << GPIO_PUMODE_SHIFT) /* Neither pull-up nor -down */
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# define GPIO_PULLDN (1 << GPIO_PUMODE_SHIFT) /* Pull-down resistor enabled */
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# define GPIO_PULLUP (2 << GPIO_PUMODE_SHIFT) /* Pull-up resistor enabled */
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# define GPIO_REPEATER (3 << GPIO_PUMODE_SHIFT) /* Repeater mode enabled */
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/* Open drain: O */
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#define GPIO_OPEN_DRAIN (1 << 9) /* Bit 9: Open drain mode */
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/* Initial value: V */
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#define GPIO_VALUE (1 << 8) /* Bit 8: Initial GPIO output value */
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# define GPIO_VALUE_ONE GPIO_VALUE
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# define GPIO_VALUE_ZERO (0)
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/* Port number: PPP (0-5) */
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#define GPIO_PORT_SHIFT (5) /* Bit 5-7: Port number */
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#define GPIO_PORT_MASK (7 << GPIO_PORT_SHIFT)
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# define GPIO_PORT0 (0 << GPIO_PORT_SHIFT)
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# define GPIO_PORT1 (1 << GPIO_PORT_SHIFT)
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# define GPIO_PORT2 (2 << GPIO_PORT_SHIFT)
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# define GPIO_PORT3 (3 << GPIO_PORT_SHIFT)
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# define GPIO_PORT4 (4 << GPIO_PORT_SHIFT)
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# define GPIO_PORT5 (5 << GPIO_PORT_SHIFT)
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#define GPIO_NPORTS 6
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/* Pin number: NNNNN (0-31) */
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#define GPIO_PIN_SHIFT 0 /* Bits 0-4: GPIO number: 0-31 */
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#define GPIO_PIN_MASK (31 << GPIO_PIN_SHIFT)
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# define GPIO_PIN0 (0 << GPIO_PIN_SHIFT)
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# define GPIO_PIN1 (1 << GPIO_PIN_SHIFT)
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# define GPIO_PIN2 (2 << GPIO_PIN_SHIFT)
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# define GPIO_PIN3 (3 << GPIO_PIN_SHIFT)
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# define GPIO_PIN4 (4 << GPIO_PIN_SHIFT)
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# define GPIO_PIN5 (5 << GPIO_PIN_SHIFT)
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# define GPIO_PIN6 (6 << GPIO_PIN_SHIFT)
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# define GPIO_PIN7 (7 << GPIO_PIN_SHIFT)
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# define GPIO_PIN8 (8 << GPIO_PIN_SHIFT)
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# define GPIO_PIN9 (9 << GPIO_PIN_SHIFT)
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# define GPIO_PIN10 (10 << GPIO_PIN_SHIFT)
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# define GPIO_PIN11 (11 << GPIO_PIN_SHIFT)
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# define GPIO_PIN12 (12 << GPIO_PIN_SHIFT)
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# define GPIO_PIN13 (13 << GPIO_PIN_SHIFT)
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# define GPIO_PIN14 (14 << GPIO_PIN_SHIFT)
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# define GPIO_PIN15 (15 << GPIO_PIN_SHIFT)
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# define GPIO_PIN16 (16 << GPIO_PIN_SHIFT)
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# define GPIO_PIN17 (17 << GPIO_PIN_SHIFT)
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# define GPIO_PIN18 (18 << GPIO_PIN_SHIFT)
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# define GPIO_PIN19 (19 << GPIO_PIN_SHIFT)
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# define GPIO_PIN20 (20 << GPIO_PIN_SHIFT)
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# define GPIO_PIN21 (21 << GPIO_PIN_SHIFT)
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# define GPIO_PIN22 (22 << GPIO_PIN_SHIFT)
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# define GPIO_PIN23 (23 << GPIO_PIN_SHIFT)
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# define GPIO_PIN24 (24 << GPIO_PIN_SHIFT)
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# define GPIO_PIN25 (25 << GPIO_PIN_SHIFT)
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# define GPIO_PIN26 (26 << GPIO_PIN_SHIFT)
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# define GPIO_PIN27 (27 << GPIO_PIN_SHIFT)
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# define GPIO_PIN28 (28 << GPIO_PIN_SHIFT)
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# define GPIO_PIN29 (29 << GPIO_PIN_SHIFT)
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# define GPIO_PIN30 (30 << GPIO_PIN_SHIFT)
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# define GPIO_PIN31 (31 << GPIO_PIN_SHIFT)
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/************************************************************************************
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* Public Types
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************************************************************************************/
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typedef uint32_t lpc17_40_pinset_t;
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/************************************************************************************
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* Public Data
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************************************************************************************/
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#ifndef __ASSEMBLY__
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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#ifdef __cplusplus
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_ARM_SRC_LPC17XX_40XX_LPC178X_GPIO_H */
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