149 lines
5.7 KiB
C
149 lines
5.7 KiB
C
/****************************************************************************
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* arch/xtensa/src/common/xtensa_timer.h
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*
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* Adapted from use in NuttX by:
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*
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* Copyright (C) 2016 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Derives from logic originally provided by Cadence Design Systems Inc.
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* Copyright (c) 2003-2015 Cadence Design Systems, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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*******************************************************************************/
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#ifndef __ARCH_XTENSA_SRC_COMMON_XTENSA_TIMER_H
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#define __ARCH_XTENSA_SRC_COMMON_XTENSA_TIMER_H
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#ifdef __ASSEMBLER__
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//# include <xtensa/coreasm.h>
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#endif
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#include <arch/xtensa/core.h>
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#include <arch/xtensa/xtensa_corebits.h>
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#include <arch/board/board.h>
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/* Select timer to use for periodic tick, and determine its interrupt number
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* and priority. User may specify a timer by defining XT_TIMER_INDEX with -D,
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* in which case its validity is checked (it must exist in this core and must
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* not be on a high priority interrupt - an error will be reported in invalid).
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* Otherwise select the first low or medium priority interrupt timer available.
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*/
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#if XCHAL_NUM_TIMERS == 0
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# error "This Xtensa configuration is unsupported, it has no timers."
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#else
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#ifndef XT_TIMER_INDEX
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# if XCHAL_TIMER3_INTERRUPT != XTHAL_TIMER_UNCONFIGURED
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# if XCHAL_INT_LEVEL(XCHAL_TIMER3_INTERRUPT) <= XCHAL_EXCM_LEVEL
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# undef XT_TIMER_INDEX
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# define XT_TIMER_INDEX 3
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# endif
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# endif
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# if XCHAL_TIMER2_INTERRUPT != XTHAL_TIMER_UNCONFIGURED
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# if XCHAL_INT_LEVEL(XCHAL_TIMER2_INTERRUPT) <= XCHAL_EXCM_LEVEL
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# undef XT_TIMER_INDEX
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# define XT_TIMER_INDEX 2
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# endif
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# endif
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# if XCHAL_TIMER1_INTERRUPT != XTHAL_TIMER_UNCONFIGURED
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# if XCHAL_INT_LEVEL(XCHAL_TIMER1_INTERRUPT) <= XCHAL_EXCM_LEVEL
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# undef XT_TIMER_INDEX
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# define XT_TIMER_INDEX 1
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# endif
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# endif
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# if XCHAL_TIMER0_INTERRUPT != XTHAL_TIMER_UNCONFIGURED
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# if XCHAL_INT_LEVEL(XCHAL_TIMER0_INTERRUPT) <= XCHAL_EXCM_LEVEL
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# undef XT_TIMER_INDEX
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# define XT_TIMER_INDEX 0
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# endif
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# endif
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#endif
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#ifndef XT_TIMER_INDEX
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# error "There is no suitable timer in this Xtensa configuration."
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#endif
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#define XT_CCOMPARE (CCOMPARE + XT_TIMER_INDEX)
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#define XT_TIMER_INTNUM XCHAL_TIMER_INTERRUPT(XT_TIMER_INDEX)
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#define XT_TIMER_INTPRI XCHAL_INT_LEVEL(XT_TIMER_INTNUM)
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#define XT_TIMER_INTEN (1 << XT_TIMER_INTNUM)
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#if XT_TIMER_INTNUM == XTHAL_TIMER_UNCONFIGURED
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# error "The timer selected by XT_TIMER_INDEX does not exist in this core."
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#elif XT_TIMER_INTPRI > XCHAL_EXCM_LEVEL
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# error "The timer interrupt cannot be high priority (use medium or low)."
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#endif
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#endif /* XCHAL_NUM_TIMERS */
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/* Set processor clock frequency, used to determine clock divisor for timer
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* tick. User should BE SURE TO ADJUST THIS for the Xtensa platform being
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* used. If using a supported board via the board-independent API defined in
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* xtbsp.h, this may be left undefined and frequency and tick divisor will
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* be computed and cached during run-time initialization.
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*
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* NOTE ON SIMULATOR:
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* Under the Xtensa instruction set simulator, the frequency can only be
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* estimated because it depends on the speed of the host and the version of
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* the simulator. Also because it runs much slower than hardware, it is not
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* possible to achieve real-time performance for most applications under the
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* simulator. A frequency too low does not allow enough time between timer
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* interrupts, starving threads. To obtain a more convenient but non-real-
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* time tick duration on the simulator, compile with xt-xcc option
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* "-DXT_SIMULATOR". Adjust this frequency to taste (it's not real-time
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* anyway!).
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*/
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#if defined(XT_SIMULATOR) && !defined(BOARD_CLOCK_FREQUENCY)
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# define BOARD_CLOCK_FREQUENCY
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#endif
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#if !defined(BOARD_CLOCK_FREQUENCY) && !defined(XT_BOARD)
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# warning "BOARD_CLOCK_FREQUENCY must be defined for the target platform."
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#endif
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/* Default number of timer "ticks" per second (default 100 for 10ms tick).
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* RTOS may define this in its own way (if applicable) in xtensa_rtos.h.
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* User may redefine this to an optimal value for the application, either by
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* editing this here or in xtensa_rtos.h, or compiling with xt-xcc option
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* "-DXT_TICK_PER_SEC=<value>" where <value> is a suitable number.
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*/
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#ifndef XT_TICK_PER_SEC
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# define XT_TICK_PER_SEC (1000000 / CONFIG_USEC_PER_TICK)
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#endif
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/* Derivation of clock divisor for timer tick and interrupt (one per tick). */
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#ifdef BOARD_CLOCK_FREQUENCY
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# define XT_TICK_DIVISOR (BOARD_CLOCK_FREQUENCY / XT_TICK_PER_SEC)
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#endif
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#ifndef __ASSEMBLER__
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extern unsigned _xt_tick_divisor;
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void _xt_tick_divisor_init(void);
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#endif
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#endif /* __ARCH_XTENSA_SRC_COMMON_XTENSA_TIMER_H */
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