aa8a8df07c
The license for wireless/spirit is added to the LICENSE file Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
456 lines
20 KiB
C
456 lines
20 KiB
C
/******************************************************************************
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* drivers/wireless/spirit/include/spirit_irq.h
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*
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* Copyright(c) 2015 STMicroelectronics
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* Author: VMA division - AMS
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* Version 3.2.2 08-July-2015
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************/
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#ifndef __DRIVERS_WIRELESS_SPIRIT_INCLUDE_SPIRIT_IRQ_H
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#define __DRIVERS_WIRELESS_SPIRIT_INCLUDE_SPIRIT_IRQ_H
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/* On the Spirit side specific IRQs can be enabled by setting a specific
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* bitmask.
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* The Spirit libraries allow the user to do this in two different ways:
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*
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* The first enables the IRQs one by one, i.e. using an SPI transaction for
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* each IRQ to enable.
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*
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* Example:
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*
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* spirit_irq_disableall(spirit); # this call is used to reset the IRQ mask
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* registers
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* spirit_irq_enable(spirit, RX_DATA_READY , S_ENABLE);
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* spirit_irq_enable(spirit, VALID_SYNC , S_ENABLE);
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* spirit_irq_enable(spirit, RX_TIMEOUT , S_ENABLE);
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*
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* The most applications will require a Spirit IRQ notification on an
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* microcontroller EXTI line. Then, the user can check which IRQ has been
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* raised using two different ways.
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*
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* On the ISR of the EXTI line phisically linked to the Spirit pin
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* configured for IRQ:
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*
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* Check only one Spirit IRQ (because the Spirit IRQ status register
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* automatically blanks itself after an SPI reading) into the ISR.
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*
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* Example:
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*
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* if (spirit_irq_is_pending(RX_DATA_READY))
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* {
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* # do something...
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* }
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*
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* Check more than one Spirit IRQ status by storing the entire IRQ status
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* registers into a bitfields struct spirit_irqset_s structure and then
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* check the interesting bits.
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*
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* Example:
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*
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* spirit_irq_get_pending(&irqStatus);
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*
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* if (irqStatus.IRQ_RX_DATA_READY)
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* {
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* # do something...
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* }
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*
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* if (irqStatus.IRQ_VALID_SYNC)
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* {
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* # do something...
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* }
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*
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* if (irqStatus.RX_TIMEOUT)
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* {
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* # do something...
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* }
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*/
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/******************************************************************************
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* Included Files
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******************************************************************************/
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#include "spirit_types.h"
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#include "spirit_regs.h"
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/******************************************************************************
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* Pre-processor Definitions
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******************************************************************************/
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/* uint32_t masks */
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#define IRQ_TX_FIFO_ALMOST_EMPTY_MASK (0x00010000) /* (1 << 16) */
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#define IRQ_RX_FIFO_ALMOST_FULL_MASK (0x00020000) /* (1 << 17) */
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#define IRQ_VALID_SYNC_MASK (0x00200000) /* (1 << 21) */
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#define IRQ_RX_DATA_READY_MASK (0x01000000) /* (1 << 24) */
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#define IRQ_RX_DATA_DISC_MASK (0x02000000) /* (1 << 25) */
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#define IRQ_TX_DATA_SENT_MASK (0x04000000) /* (1 << 26) */
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#define IRQ_TX_FIFO_ERROR_MASK (0x20000000) /* (1 << 29) */
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#define IRQ_RX_FIFO_ERROR_MASK (0x40000000) /* (1 << 30) */
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/* Macros used in assertions */
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#define IS_SPIRIT_IRQ_LIST(value) \
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((value == RX_DATA_READY) || (value == RX_DATA_DISC) || \
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(value == TX_DATA_SENT) || (value == MAX_RE_TX_REACH) || \
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(value == CRC_ERROR) || (value == TX_FIFO_ERROR) || \
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(value == RX_FIFO_ERROR) || (value == TX_FIFO_ALMOST_FULL) || \
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(value == TX_FIFO_ALMOST_EMPTY) || (value == RX_FIFO_ALMOST_FULL) || \
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(value == RX_FIFO_ALMOST_EMPTY) || (value == MAX_BO_CCA_REACH) || \
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(value == VALID_PREAMBLE) || (value == VALID_SYNC) || \
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(value == RSSI_ABOVE_TH) || (value == WKUP_TOUT_LDC) || \
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(value == READY) || (value == STANDBY_DELAYED) || \
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(value == LOW_BATT_LVL) || (value == POR) || \
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(value == BOR) || (value == LOCK) || \
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(value == PM_COUNT_EXPIRED) || (value == XO_COUNT_EXPIRED) || \
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(value == SYNTH_LOCK_TIMEOUT) || (value == SYNTH_LOCK_STARTUP) || \
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(value == SYNTH_CAL_TIMEOUT) || (value == TX_START_TIME) || \
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(value == RX_START_TIME) || (value == RX_TIMEOUT) || \
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(value == AES_END) || (value == ALL_IRQ ))
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/******************************************************************************
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* Public Types
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******************************************************************************/
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/* IRQ bitfield structure for SPIRIT. This structure is used to read or write
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* the single IRQ bit. During the initialization the user has to fill this
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* structure setting to one the single field related to the IRQ he wants to
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* enable, and to zero the single field related to all the IRQs he wants to
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* disable.
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*
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* The same structure can be used to retrieve all the IRQ events from the IRQ
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* registers IRQ_STATUS[3:0], and read if one or more specific IRQ raised.
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*
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* NOTE: The fields order in the structure depends on used endianness (little
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* or big endian). The actual definition is valid ONLY for LITTLE ENDIAN
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* mode. Be sure to change the field order when use a different endianness.
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*/
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#ifndef CONFIG_ENDIAN_BIG
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struct spirit_irqset_s
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{
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uint8_t IRQ_SYNTH_LOCK_TIMEOUT : 1; /* IRQ: only for debug; LOCK state
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* timeout */
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uint8_t IRQ_SYNTH_LOCK_STARTUP : 1; /* IRQ: only for debug; see
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* CALIBR_START_COUNTER */
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uint8_t IRQ_SYNTH_CAL_TIMEOUT : 1; /* IRQ: only for debug; SYNTH
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* calibration timeout */
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uint8_t IRQ_TX_START_TIME : 1; /* IRQ: only for debug; TX
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* circuitry startup time; see
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* TX_START_COUNTER */
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uint8_t IRQ_RX_START_TIME : 1; /* IRQ: only for debug; RX
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* circuitry startup time; see
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* TX_START_COUNTER */
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uint8_t IRQ_RX_TIMEOUT : 1; /* IRQ: RX operation timeout */
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uint8_t IRQ_AES_END : 1; /* IRQ: AES End of operation */
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uint8_t reserved : 1; /* Reserved bit */
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uint8_t IRQ_READY : 1; /* IRQ: READY state */
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uint8_t IRQ_STANDBY_DELAYED : 1; /* IRQ: STANDBY state after
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* MCU_CK_CONF_CLOCK_TAIL_X
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* clock cycles */
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uint8_t IRQ_LOW_BATT_LVL : 1; /* IRQ: Battery level below
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* threshold */
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uint8_t IRQ_POR : 1; /* IRQ: Power On Reset */
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uint8_t IRQ_BOR : 1; /* IRQ: Brown out event (both
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* accurate and inaccurate) */
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uint8_t IRQ_LOCK : 1; /* IRQ: LOCK state */
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uint8_t IRQ_PM_COUNT_EXPIRED : 1; /* IRQ: only for debug;
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* Power Management startup
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* timer expiration (see reg
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* PM_START_COUNTER, 0xB5) */
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uint8_t IRQ_XO_COUNT_EXPIRED : 1; /* IRQ: only for debug;
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* Crystal oscillator settling
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* time counter expired */
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uint8_t IRQ_TX_FIFO_ALMOST_EMPTY : 1; /* IRQ: TX FIFO almost empty */
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uint8_t IRQ_RX_FIFO_ALMOST_FULL : 1; /* IRQ: RX FIFO almost full */
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uint8_t IRQ_RX_FIFO_ALMOST_EMPTY : 1; /* IRQ: RX FIFO almost empty */
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uint8_t IRQ_MAX_BO_CCA_REACH : 1; /* IRQ: Max number of back-off
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* during CCA */
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uint8_t IRQ_VALID_PREAMBLE : 1; /* IRQ: Valid preamble detected */
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uint8_t IRQ_VALID_SYNC : 1; /* IRQ: Sync word detected */
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uint8_t IRQ_RSSI_ABOVE_TH : 1; /* IRQ: RSSI above threshold */
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uint8_t IRQ_WKUP_TOUT_LDC : 1; /* IRQ: Wake-up timeout in LDC mode */
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uint8_t IRQ_RX_DATA_READY : 1; /* IRQ: RX data ready */
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uint8_t IRQ_RX_DATA_DISC : 1; /* IRQ: RX data discarded
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* (upon filtering) */
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uint8_t IRQ_TX_DATA_SENT : 1; /* IRQ: TX data sent */
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uint8_t IRQ_MAX_RE_TX_REACH : 1; /* IRQ: Max re-TX reached */
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uint8_t IRQ_CRC_ERROR : 1; /* IRQ: CRC error */
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uint8_t IRQ_TX_FIFO_ERROR : 1; /* IRQ: TX FIFO underflow/overflow
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* error */
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uint8_t IRQ_RX_FIFO_ERROR : 1; /* IRQ: RX FIFO underflow/overflow
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* error */
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uint8_t IRQ_TX_FIFO_ALMOST_FULL : 1; /* IRQ: TX FIFO almost full */
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};
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#endif
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/* IRQ list enumeration for SPIRIT. This enumeration type can be used to
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* address a specific IRQ.
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*/
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enum spirit_irq_e
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{
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RX_DATA_READY = 0x00000001, /* IRQ: RX data ready */
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RX_DATA_DISC = 0x00000002, /* IRQ: RX data discarded (upon
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* filtering) */
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TX_DATA_SENT = 0x00000004, /* IRQ: TX data sent */
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MAX_RE_TX_REACH = 0x00000008, /* IRQ: Max re-TX reached */
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CRC_ERROR = 0x00000010, /* IRQ: CRC error */
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TX_FIFO_ERROR = 0x00000020, /* IRQ: TX FIFO underflow/overflow
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* error */
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RX_FIFO_ERROR = 0x00000040, /* IRQ: RX FIFO underflow/overflow
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* error */
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TX_FIFO_ALMOST_FULL = 0x00000080, /* IRQ: TX FIFO almost full */
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TX_FIFO_ALMOST_EMPTY = 0x00000100, /* IRQ: TX FIFO almost empty */
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RX_FIFO_ALMOST_FULL = 0x00000200, /* IRQ: RX FIFO almost full */
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RX_FIFO_ALMOST_EMPTY = 0x00000400, /* IRQ: RX FIFO almost empty */
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MAX_BO_CCA_REACH = 0x00000800, /* IRQ: Max number of back-off
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* during CCA */
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VALID_PREAMBLE = 0x00001000, /* IRQ: Valid preamble detected */
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VALID_SYNC = 0x00002000, /* IRQ: Sync word detected */
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RSSI_ABOVE_TH = 0x00004000, /* IRQ: RSSI above threshold */
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WKUP_TOUT_LDC = 0x00008000, /* IRQ: Wake-up timeout in LDC mode */
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READY = 0x00010000, /* IRQ: READY state */
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STANDBY_DELAYED = 0x00020000, /* IRQ: STANDBY state after
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* MCU_CK_CONF_CLOCK_TAIL_X clock
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* cycles */
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LOW_BATT_LVL = 0x00040000, /* IRQ: Battery level below
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* threshold */
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POR = 0x00080000, /* IRQ: Power On Reset */
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BOR = 0x00100000, /* IRQ: Brown out event (both accurate and
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* inaccurate) */
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LOCK = 0x00200000, /* IRQ: LOCK state */
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PM_COUNT_EXPIRED = 0x00400000, /* IRQ: only for debug; Power
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* Management startup timer expiration
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* (see reg PM_START_COUNTER, 0xB5) */
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XO_COUNT_EXPIRED = 0x00800000, /* IRQ: only for debug; Crystal
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* oscillator settling time counter
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* expired */
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SYNTH_LOCK_TIMEOUT = 0x01000000, /* IRQ: only for debug; LOCK state
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* timeout */
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SYNTH_LOCK_STARTUP = 0x02000000, /* IRQ: only for debug; see
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* CALIBR_START_COUNTER */
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SYNTH_CAL_TIMEOUT = 0x04000000, /* IRQ: only for debug; SYNTH
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* calibration timeout */
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TX_START_TIME = 0x08000000, /* IRQ: only for debug; TX circuitry
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* startup time; see TX_START_COUNTER */
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RX_START_TIME = 0x10000000, /* IRQ: only for debug; RX circuitry
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* startup time; see TX_START_COUNTER */
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RX_TIMEOUT = 0x20000000, /* IRQ: RX operation timeout */
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AES_END = 0x40000000, /* IRQ: AES End of operation */
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ALL_IRQ = 0x7fffffff /* All the above mentioned IRQs */
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};
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/******************************************************************************
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* Public Function Prototypes
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******************************************************************************/
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/******************************************************************************
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* Name: spirit_irq_disable_all
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*
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* Description:
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* Ssets the IRQ mask registers to 0x00000000, disabling all IRQs.
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*
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* Input Parameters:
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* spirit - Reference to a Spirit library state structure instance
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*
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* Returned Value:
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* Zero (OK) on success; a negated errno value on failure.
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*
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******************************************************************************/
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int spirit_irq_disable_all(FAR struct spirit_library_s *spirit);
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/******************************************************************************
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* Name: spirit_irq_set_mask
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*
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* Description:
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* Enables/disables all the IRQs according to the user defined irqset
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* structure.
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*
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* Input Parameters:
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* spirit - Reference to a Spirit library state structure instance
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* irqset - Pointer to a variable of type struct spirit_irqset_s, through
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* which the user enable specific IRQs. This parameter is a
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* pointer to a struct spirit_irqset_s.
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*
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* For example suppose to enable only the two IRQ Low Battery Level
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* and Tx Data Sent:
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*
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* struct spirit_irqset_s g_irqset = {0};
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* g_irqset.IRQ_LOW_BATT_LVL = 1;
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* g_irqset.IRQ_TX_DATA_SENT = 1;
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* spirit_irq_setmask(&g_irqset);
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*
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* Returned Value:
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* Zero (OK) on success; a negated errno value on failure.
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*
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******************************************************************************/
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#ifndef CONFIG_ENDIAN_BIG
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int spirit_irq_set_mask(FAR struct spirit_library_s *spirit,
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FAR struct spirit_irqset_s *irqset);
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#endif
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/******************************************************************************
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* Name: spirit_irq_enable
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*
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* Description:
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* Enables or disables a specific IRQ.
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*
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* Input Parameters:
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* spirit - Reference to a Spirit library state structure instance
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* irq IRQ to enable or disable.
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* newstate - new state for the IRQ.
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*
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* Returned Value:
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* Zero (OK) on success; a negated errno value on failure.
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*
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******************************************************************************/
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int spirit_irq_enable(FAR struct spirit_library_s *spirit,
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enum spirit_irq_e irq,
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enum spirit_functional_state_e newstate);
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/******************************************************************************
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* Name: spirit_irt_get_mask
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*
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* Description:
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* Fills a pointer to a structure of struct spirit_irqset_s type with the
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* content of the IRQ_MASK registers.
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*
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* Input Parameters:
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* spirit - Reference to a Spirit library state structure instance
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* pirqmask - Pointer to a variable of type struct spirit_irqset_s, through
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* which the user can read which IRQs are enabled. All the
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* bitfields equals to zero correspond to enabled IRQs, while
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* all the bitfields equals to one correspond to disabled IRQs.
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*
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* For example suppose that the Power On Reset and RX Data
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* ready are the only enabled IRQs.
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*
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* struct spirit_irqset_s g_irqmask;
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* spirit_irq_get_pending(&g_irqmask);
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*
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* Then g_irqmask.IRQ_POR and g_irqmask.IRQ_RX_DATA_READY are
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* equal to 0 while all the other bitfields are equal to one.
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*
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* Returned Value:
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* Zero (OK) on success; a negated errno value on failure.
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*
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******************************************************************************/
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#ifndef CONFIG_ENDIAN_BIG
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int spirit_irt_get_mask(FAR struct spirit_library_s *spirit,
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FAR struct spirit_irqset_s *pirqmask);
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#endif
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/******************************************************************************
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* Name: spirit_irq_get_pending
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*
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* Description:
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* Fills a pointer to a structure of struct spirit_irqset_s type with the
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* content of the IRQ_STATUS registers.
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*
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* Input Parameters:
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* spirit - Reference to a Spirit library state structure instance
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* pirqstatus - A pointer to a variable of type struct spirit_irqset_s,
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* through which the user can receive the status of all the
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* IRQs. All the bitfields equals to one correspond to the
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* raised interrupts.
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*
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* For example suppose that the XO settling timeout is raised
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* as well as the Sync word detection.
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*
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* struct spirit_irqset_s g_irqstatus;
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* spirit_irq_get_pending(&g_irqstatus);
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*
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* Then g_irqstatus.IRQ_XO_COUNT_EXPIRED and
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* g_irqstatus.IRQ_VALID_SYNC are equals to 1* while all the
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* other bitfields are equals to zero.
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*
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* Returned Value:
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* Zero (OK) on success; a negated errno value on failure.
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*
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******************************************************************************/
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#ifndef CONFIG_ENDIAN_BIG
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int spirit_irq_get_pending(FAR struct spirit_library_s *spirit,
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FAR struct spirit_irqset_s *pirqstatus);
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#endif
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/******************************************************************************
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* Name: spirit_irq_clr_pending
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*
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* Description:
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* Clear all IRQ status registers.
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*
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* Input Parameters:
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* spirit - Reference to a Spirit library state structure instance
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*
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* Returned Value:
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* Zero (OK) on success; a negated errno value on failure.
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*
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******************************************************************************/
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int spirit_irq_clr_pending(FAR struct spirit_library_s *spirit);
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/******************************************************************************
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* Name: spirit_irq_is_pending
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*
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* Description:
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* Checks if a specific IRQ has been generated. The call resets all the
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* IRQ status, so it can't be used in case of multiple raising interrupts.
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*
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* Input Parameters:
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* spirit - Reference to a Spirit library state structure instance
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* flag IRQ flag to be checked.
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* This parameter can be any value of enum spirit_irq_e.
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*
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* Returned Value:
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* true or false.
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*
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******************************************************************************/
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bool spirit_irq_is_pending(FAR struct spirit_library_s *spirit,
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enum spirit_irq_e flag);
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#ifdef __cplusplus
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}
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#endif
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#endif /* __DRIVERS_WIRELESS_SPIRIT_INCLUDE_SPIRIT_IRQ_H */
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