nuttx/arch/arm/include/stm32
Nathan Hartman 87bfa24c8c stm32/stm32_spi: Add SPI register definitions for STM32G47XX
arch/arm/src/stm32/hardware/stm32_spi.h:

    * Avoid numerous ifdef on STM32 part numbers and make the
      different variations of SPI peripheral features more
      self-documenting: based on STM32_HAVE_IP_SPI_V* defines
      from chip.h, define some or all of HAVE_SPI_I2S,
      HAVE_SPI_TI_MODE, HAVE_SPI_ARB_DATA_SIZE, HAVE_SPI_FIFOS,
      HAVE_SPI_NSSP, HAVE_SPI_I2S_ASTRT, and make decisions on
      which registers and bitfields to define based on them.

    * Define registers and bitfields for STM32_HAVE_IP_SPI_V4,
      currently used only for STM32G47XX family MCUs, including
      SPI_CR1_CRCL, SPI_CR2_NSSP, SPI_CR2_FRXTH, SPI_CR2_LDMARX,
      SPI_CR2_LDMATX, SPI_CR2_DS_SHIFT/SPI_CR2_DS_MASK,
      SPI_SR_FRLVL_SHIFT/SPI_SR_FRLVL_MASK, and
      SPI_I2SCFGR_ASTRTEN.

    * SPI_I2SCFGR_I2SSTD_PHILLIPS: Was defined incorrectly as
      (xx << SPI_I2SCFGR_I2SSTD_SHIFT). Corrected this to
      (0 << SPI_I2SCFGR_I2SSTD_SHIFT).

    * SPI_I2SCFGR_I2SSTD_MSB: Was defined incorrectly as
      (0 << SPI_I2SCFGR_I2SSTD_SHIFT). Corrected this to
      (1 << SPI_I2SCFGR_I2SSTD_SHIFT).

    * Fix nxstyle errors.

arch/arm/include/stm32/chip.h:

    * Add new section "Peripheral IP versions" and specify version of
      SPI IP block for STM32F10XX, STM32F20XX, STM32F30XX, STM32F33XX,
      STM32F37XX, STM32F4XXX, STM32G47XX, and STM32L15XX.
2020-11-12 04:37:32 -08:00
..
chip.h stm32/stm32_spi: Add SPI register definitions for STM32G47XX 2020-11-12 04:37:32 -08:00
irq.h Add support for STM32G474: Modify existing files 2020-05-23 09:02:00 -03:00
stm32f10xxx_irq.h
stm32f20xxx_irq.h
stm32f30xxx_irq.h
stm32f33xxx_irq.h
stm32f37xxx_irq.h
stm32f40xxx_irq.h Added support for STM32F412xx. Tested with the NUCLEO-F412ZG dev board as well as a custom board using the STM32F412CE. 2020-06-29 17:44:35 +02:00
stm32g47xxx_irq.h Add support for STM32G474: New files 2020-05-23 09:02:00 -03:00
stm32l15xxx_irq.h