nuttx/configs/makerlisp/nsh_flash/nsh_ram.ztgt
Gregory Nutt a73cd667d9 configs/makerlisp: This commit brings in a new configuration to support execution entirely out of external SRAM.
Squashed commit of the following:

    configs/makerlisp/scripts/makerlisp_ram.linkcmd:  Fixup .RESET and .STARTUP.  These need to be redirected to RAM since they default to ROM.

    configs/makerlisp/scripts/makerlisp_ram.linkcmd:  Restore some settings that should be unnecessary but are really required by the current implementation.

    configs/makerlisp:  Rename nsh configuratinon to nsh_flash.  Create new configuration, nsh_ram, that is identical to the nsh_flash configuration except that the code runs out of external SRAM.

    configs/makerlisp/scripts:  Add a linker script to support execution from RAM.
2019-06-26 09:56:20 -06:00

70 lines
2.2 KiB
XML

<?xml version="1.0" encoding="UTF-8"?>
<Target name="eZ80F910300KITG_RAM" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="../../Schemas/target.tsd" xsi:type="TargetEZ80">
<Clock>
<PLL>
<changeFrequencyOnReset>true</changeFrequencyOnReset>
<chargePumpFreq>1f4</chargePumpFreq>
<clockLockCriteria>8</clockLockCriteria>
<oscFrequency>5000000</oscFrequency>
</PLL>
<clockType>PLL</clockType>
<frequency>50000000</frequency>
</Clock>
<ControlReg>
<pc>0</pc>
<splStackPtr>100000</splStackPtr>
<spsStackPtr>ffff</spsStackPtr>
<useAdlMode>true</useAdlMode>
</ControlReg>
<ExtFlash>
<device />
<externalAddress>200000</externalAddress>
<externalAutoSelect>false</externalAutoSelect>
<externalRamLower>000000</externalRamLower>
<externalRamUpper>FFFFF</externalRamUpper>
<manufacturer />
<units>1</units>
<usingExternal>false</usingExternal>
<usingInternal>true</usingInternal>
</ExtFlash>
<Memory>
<ChipSelects>
<CS0>
<busMode>0</busMode>
<controlRegister>8</controlRegister>
<lower>0</lower>
<upper>7</upper>
</CS0>
<CS1>
<busMode>0</busMode>
<controlRegister>8</controlRegister>
<lower>8</lower>
<upper>F</upper>
</CS1>
<CS2>
<busMode>0</busMode>
<controlRegister>28</controlRegister>
<lower>20</lower>
<upper>9F</upper>
</CS2>
<CS3>
<busMode>0</busMode>
<controlRegister>0</controlRegister>
<lower>0</lower>
<upper>0</upper>
</CS3>
</ChipSelects>
<Internal>
<mapFlashToPage>0</mapFlashToPage>
<mapRamToPage>AF</mapRamToPage>
<useFlashRam>false</useFlashRam>
<useInternalDataRam>true</useInternalDataRam>
<useMaccRam>false</useMaccRam>
</Internal>
<waitStates>4</waitStates>
</Memory>
<cpu>EZ80F91</cpu>
<schemaVersion>1.0.1</schemaVersion>
<version>1.00</version>
</Target>