Gregory Nutt 6fd4caf00f Implemente support for STM32 F1 banked FLASH ... Squashed commit of the following: arch/arm/src/stm32/stm32f10xxf30xx_flash.c: Re-implemented Dmitriy Linikov's change to support multi-banked FLASH on the STM32 F1 parts AFTER separating the FLASH support by architecture and implementing more standard base+offset register addressing. Now the change goes in rather cleanly. arch/arm/src/stm32/stm32f10xxf30xx_flash.c: Use base + offset address to simplify implementation of dual bank flash.		2018-06-05 12:50:55 -06:00
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include	configs/imxrt1050-evk: Fix OCRAM size used in linker script.	2018-05-24 16:51:18 -06:00
src	Implemente support for STM32 F1 banked FLASH	2018-06-05 12:50:55 -06:00
Kconfig	Back out part of f4bcaa4fc2dc2f06d5632d3b74f43c25a6e7e845.If CONFIG_ARCH_IDLE_CUSTOM is defined, then it should not use the version of lc823450_idle.c in arch/arm/src/lc823450. That part was correct before the PR. If CONFIG_ARCH_IDLE_CUSTOM, then the build should use a custom IDLE loop in the board src/ directory.	2018-05-11 06:26:01 -06:00