9906163beb
Co-authored-by: Jari van Ewijk <jari.vanewijk@nxp.com> Co-authored-by: David Sidrane <david.sidrane@nscdg.com> Co-authored-by: Peter van der Perk <peter.vanderperk@nxp.com> imxrt:Kconfig fix formatting imxrt:usbphy move IMXRT_USBPHY{1|[2]}_BASE to memory map imxrt:lpspi Fix build breakage from adding 1170 imxrt:Finish 1170 iomux and clockconfig versioning imxrt:Remove duplicate imxrt_clock{off|all}_lpi2c4 imxrt:pmu remove duplicate dcd non 117x header imxrt:lpspi Fix unused var warnings imxrt:lpi2c Fix unused var warnings imxrt:lowputs Fix unused var warnings imxrt:imxrt117x_dmamux fix duplicate entries imxtr:serial Use IOMUX_PULL_{UP|DOWN} and map IOMUX V1 to them imxrt:MPU Support the 1170 imxrt:dmamux Alias IMXRT_DMAMUX0_BASE as IMXRT_DMAMUX_BASE imx1170:ccm Alias CCM_CCGR_DMA & CCM_CCGR_SNVS_LP for compatiblity Author: Peter van der Perk <peter.vanderperk@nxp.com> IMXRT7 Add LPUART 9/10/11/12 support Author: David Sidrane <david.sidrane@nscdg.com> imxrt:1170pinmux Add QTIMER pins imxrt:1170pinmux Add GPT pins imxrt:1170pinmux Add FLEXPWM pins imxrt1170:pinmap Add GPIO_ENET_1G pinning imxrt:enet Support ENET_1G imxrt:periphclks rt1170 does not have canX_serial clock imxrt:flexcan:Layer imxrt_ioctl imxrt117x:memorymap added CAN3 imxrt:ADC support ver1 and ver2 for imxrt117x imxrt:imxrt117x_ccm Align timer naming with other imxrt QTIMERn->TIMERn imxrt:imxrt117x_ccm align CCM names with rt106x imxrt:XBAR support larger number of selects needed on imxrt1170 Co-authored-by: Peter van der Perk <peter.vanderperk@nxp.com> FlexSPI AHB Region support, PIT rename for compatiblity imxrt:USB Analog add VBUS_VALID_3V FlexSPI expand prefetch registers for IMXRT117X imxrt:Support Initialization of FlexRam without Running from OCRAM imxrt: ocotp add UNIQUE_ID register definition imxrt: enet use ocotp unique_id imxrt: enet fixes for imxrt117x imxrt: ethernet pinmux sion enable imxrt:imxrt_periphclk_configure add memory sync Flush the pipeline to prevent bus faults, by insuring a peripheral is clocked before being accessed on return from this function. imxrt:Restructure gpioN to padmux mapping imxrt:Add imxrt1170 daisy imxrt: correct power modes for imxrt117x fixing hang on WFI imxrt: imxrt117x TCM MPU config imxrt: FlexRAM clocking DIV0 setup imxrt: 117x periphclocks wait for status bit imxrt: iomucx set pad settings correctly and allow reconfiguration imxrt: enet align buffers 64-byte for optimal performance Add DSC barriers for write-through cache support imxrt: imxrt1170 use FlexCAN FD/ECC features imxrt:iomuxc_ver2 (117x) SD_B1 and DISP_B1 use PULL feild not PUE/PUS imxrt:Fix 1170 SNVS addressing imxrt: enet set mii clock after ifdown so that phy keep working nxstyle fixes imxrt: preprocessor and include fixes Fix configs imxrt1170-evk clean defconfig
296 lines
9.3 KiB
C
296 lines
9.3 KiB
C
/****************************************************************************
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* boards/arm/imxrt/imxrt1170-evk/src/imxrt_ethernet.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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/* Force verbose debug on in this file only to support unit-level testing. */
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#ifdef CONFIG_NETDEV_PHY_DEBUG
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# undef CONFIG_DEBUG_INFO
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# define CONFIG_DEBUG_INFO 1
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# undef CONFIG_DEBUG_NET
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# define CONFIG_DEBUG_NET 1
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#endif
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#include <string.h>
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#include <assert.h>
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/irq.h>
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#include <nuttx/arch.h>
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#include <nuttx/spinlock.h>
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#include "arm_internal.h"
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#include "imxrt_gpio.h"
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#include "imxrt_enet.h"
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#include "imxrt1170-evk.h"
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#ifdef CONFIG_IMXRT_ENET
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define IMXRT_ENET_DEVNAME "eth0"
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/* Debug ********************************************************************/
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/* Extra, in-depth debug output that is only available if
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* CONFIG_NETDEV_PHY_DEBUG us defined.
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*/
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#ifdef CONFIG_NETDEV_PHY_DEBUG
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# define phyerr _err
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# define phywarn _warn
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# define phyinfo _info
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#else
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# define phyerr(x...)
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# define phywarn(x...)
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# define phyinfo(x...)
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#endif
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: imxrt_enet_phy_enable
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****************************************************************************/
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#if 1
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static void imxrt_enet_phy_enable(bool enable)
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{
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phyinfo("IRQ%d: enable=%d\n", GPIO_ENET_INT, enable);
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if (enable)
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{
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up_enable_irq(GPIO_ENET_IRQ);
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}
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else
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{
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up_disable_irq(GPIO_ENET_IRQ);
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}
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}
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#endif
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Function: imxrt_phy_boardinitialize
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*
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* Description:
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* Some boards require specialized initialization of the PHY before it can
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* be used. This may include such things as configuring GPIOs, resetting
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* the PHY, etc.
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* If CONFIG_IMXRT_ENET_PHYINIT is defined in the configuration then the
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* board specific logic must provide imxrt_phyinitialize();
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* The i.MX RT Ethernet driver will call this function one time before it
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* first uses the PHY.
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*
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* Input Parameters:
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* intf - Always zero for now.
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*
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* Returned Value:
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* OK on success; Negated errno on failure.
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*
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****************************************************************************/
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int imxrt_phy_boardinitialize(int intf)
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{
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#ifdef CONFIG_IMXRT_GPIO1_0_15_IRQ
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/* Configure the PHY interrupt pin */
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phyinfo("Configuring interrupt: %08x\n", GPIO_ENET_INT);
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imxrt_config_gpio(GPIO_ENET_INT);
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#endif
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/* Configure the PHY reset pin.
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*
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* The #RST uses inverted logic. The initial value of zero will put the
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* PHY into the reset state.
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*/
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phyinfo("Configuring reset: %08x\n", GPIO_ENET_RST);
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imxrt_config_gpio(GPIO_ENET_RST);
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imxrt_config_gpio(GPIO_ENET_INT);
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imxrt_gpio_write(GPIO_ENET_INT, true);
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imxrt_gpio_write(GPIO_ENET_RST, false);
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up_mdelay(10);
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/* Take the PHY out of reset. */
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imxrt_gpio_write(GPIO_ENET_RST, true);
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up_mdelay(1);
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/* Workaround for the IOMUX Daisy support */
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putreg32(0x1, IMXRT_INPUT_ENET_IPG_CLK_RMII);
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putreg32(0x1, IMXRT_INPUT_ENET_MDIO);
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putreg32(0x1, IMXRT_INPUT_ENET_RXDATA0);
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putreg32(0x1, IMXRT_INPUT_ENET_RXDATA1);
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putreg32(0x1, IMXRT_INPUT_ENET_RXEN);
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putreg32(0x1, IMXRT_INPUT_ENET_RXERR);
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return OK;
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}
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/****************************************************************************
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* Name: arch_phy_irq
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*
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* Description:
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* This function may be called to register an interrupt handler that will
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* be called when a PHY interrupt occurs. This function both attaches
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* the interrupt handler and enables the interrupt if 'handler' is non-
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* NULL. If handler is NULL, then the interrupt is detached and disabled
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* instead.
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*
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* The PHY interrupt is always disabled upon return. The caller must
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* call back through the enable function point to control the state of
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* the interrupt.
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*
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* This interrupt may or may not be available on a given platform depending
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* on how the network hardware architecture is implemented. In a typical
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* case, the PHY interrupt is provided to board-level logic as a GPIO
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* interrupt (in which case this is a board-specific interface and really
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* should be called board_phy_irq()); In other cases, the PHY interrupt
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* may be cause by the chip's MAC logic (in which case arch_phy_irq()) is
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* an appropriate name. Other other boards, there may be no PHY interrupts
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* available at all. If client attachable PHY interrupts are available
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* from the board or from the chip, then CONFIG_ARCH_PHY_INTERRUPT should
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* be defined to indicate that fact.
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*
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* Typical usage:
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* a. OS service logic (not application logic*) attaches to the PHY
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* PHY interrupt and enables the PHY interrupt.
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* b. When the PHY interrupt occurs: (1) the interrupt should be
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* disabled and () work should be scheduled on the worker thread (or
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* perhaps a dedicated application thread).
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* c. That worker thread should use the SIOCGMIIPHY, SIOCGMIIREG,
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* and SIOCSMIIREG ioctl calls** to communicate with the PHY,
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* determine what network event took place (Link Up/Down?), and
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* take the appropriate actions.
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* d. It should then interact the PHY to clear any pending
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* interrupts, then re-enable the PHY interrupt.
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*
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* * This is an OS internal interface and should not be used from
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* application space. Rather applications should use the SIOCMIISIG
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* ioctl to receive a signal when a PHY event occurs.
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* ** This interrupt is really of no use if the Ethernet MAC driver
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* does not support these ioctl calls.
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*
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* Input Parameters:
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* intf - Identifies the network interface. For example "eth0". Only
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* useful on platforms that support multiple Ethernet interfaces
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* and, hence, multiple PHYs and PHY interrupts.
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* handler - The client interrupt handler to be invoked when the PHY
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* asserts an interrupt. Must reside in OS space, but can
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* signal tasks in user space. A value of NULL can be passed
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* in order to detach and disable the PHY interrupt.
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* arg - The argument that will accompany the interrupt
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* enable - A function pointer that be unused to enable or disable the
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* PHY interrupt.
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*
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* Returned Value:
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* Zero (OK) returned on success; a negated errno value is returned on
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* failure.
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*
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****************************************************************************/
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#if 1
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int arch_phy_irq(const char *intf, xcpt_t handler, void *arg,
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phy_enable_t *enable)
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{
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irqstate_t flags;
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phy_enable_t enabler;
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int irq;
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DEBUGASSERT(intf);
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ninfo("%s: handler=%p\n", intf, handler);
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phyinfo("EMAC: devname=%s\n", IMXRT_ENET_DEVNAME);
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if (strcmp(intf, IMXRT_ENET_DEVNAME) == 0)
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{
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irq = GPIO_ENET_IRQ;
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enabler = imxrt_enet_phy_enable;
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}
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else
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{
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nerr("ERROR: Unsupported interface: %s\n", intf);
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return -EINVAL;
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}
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/* Disable interrupts until we are done. This guarantees that the
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* following operations are atomic.
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*/
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flags = spin_lock_irqsave(NULL);
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/* Configure the interrupt */
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if (handler)
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{
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/* The interrupt pin has already been configured as an interrupting
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* input (by imxrt_phy_boardinitialize() above).
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*
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* Attach the new button handler.
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*/
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phyinfo("Attach IRQ%d\n", irq);
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irq_attach(irq, handler, arg);
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}
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else
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{
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phyinfo("Detach IRQ%d\n", irq);
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irq_detach(irq);
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enabler = NULL;
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}
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/* Return with the interrupt disabled in either case */
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up_disable_irq(GPIO_ENET_IRQ);
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/* Return the enabling function pointer */
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if (enable)
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{
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*enable = enabler;
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}
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/* Return the old handler (so that it can be restored) */
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spin_unlock_irqrestore(NULL, flags);
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return OK;
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}
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#endif /* CONFIG_IMXRT_GPIO1_0_15_IRQ */
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#endif /* CONFIG_IMXRT_ENET */
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