kxjiang 70dc642da3 The LPC54608 can only run at a maximum frequency of 180Mhz. This configuration requires uses the clk_in, external crystal clock, to drive the PLL. When that input was selected, the board bootup failed waiting for the PLL to lock. After referring the driver from NXP, we should turn on power sources for the ext clock if system pll input select clk_in. NOTE that the LPC54628 did not require this step... perhaps because the system oscillator power was already enabled.		2018-07-08 06:58:14 -06:00
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include	Fix some errors found in build testing.	2018-06-25 17:06:29 -06:00
src	The LPC54608 can only run at a maximum frequency of 180Mhz. This configuration requires uses the clk_in, external crystal clock, to drive the PLL. When that input was selected, the board bootup failed waiting for the PLL to lock. After referring the driver from NXP, we should turn on power sources for the ext clock if system pll input select clk_in. NOTE that the LPC54628 did not require this step... perhaps because the system oscillator power was already enabled.	2018-07-08 06:58:14 -06:00
Kconfig	Squashed commit of the following:	2018-06-20 12:30:37 -06:00