119 lines
4.5 KiB
Plaintext
119 lines
4.5 KiB
Plaintext
pirelli_dpl10
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=============
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This directory contains the board support for Pirelli "Discus" DP-L10
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phones.
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This port is a variant of the compal_e88 configuration with the small
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change of enabling the IrDA serial console:
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* CONFIG_SERIAL_IRDA_CONSOLE=y
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This port is based on patches contributed by Denis Carikli for both the
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compal e99 and e88. At the time of initial check-in, the following phones
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were tested:
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* Pirelli DPL-10 nsh_highram loaded via romload in osmocon
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The patches were made by Alan Carvalho de Assis and Denis Carikli using
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the Stefan Richter's patches that can be found here:
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http://cgit.osmocom.org/cgit/nuttx-bb/log/?h=lputt%2Ftesting
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Osmocom-BB Dependencies and Sercomm
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===================================
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The build environment assumes that you have the osmocom-bb project
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directory at same level as the nuttx project:
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|- nuttx
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|- apps
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`- osmocom-bb
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If you attempt to build this configuration without osmocom-bb, and that
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you added support for sercomm in your configuration(CONFIG_SERCOMM_CONSOLE=y)
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you will get compilation errors in drivers/sercomm due to header files that
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are needed from the osmocom-bb directory.
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By default, NuttX will not use sercomm (HDLC protocol) to communicate with
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the host system. Sercomm is the transport used by osmocom-bb that runs on top
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of serial. See http://bb.osmocom.org/trac/wiki/nuttx-bb/run for detailed
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the usage of nuttx with sercomm.
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Loading NuttX
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=============
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The osmocom-bb wiki describes how to load NuttX. See
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http://bb.osmocom.org/trac/wiki/nuttx-bb for detailed information.
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The way that nuttx is loaded depends on the configuration (highram/compalram)
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and phone:
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o compalram is for the ramloader(for phone having a bootloader on flash)
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o highram is for phones having the romloader(if the phone has a bootrom)
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or for loading in the ram trough a special loader(loaded first on ram
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by talking to the ramloader) when having a ramloader(which can only
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load 64k).
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JTAG and Alternative Serial Console
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===================================
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JTAG
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All JTAG lines, as well as the second uart (UART_MODEM), go to the
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unpopulated connector next to the display connector.
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--- ---------------------------
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PIN SIGNAL
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--- ---------------------------
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1 Vcc
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2 RX_MODEM
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3 TESTRSTz (Iota)
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4 TDI
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5 TMS
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6 TCK
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7 TX_MODEM
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8 TDO
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9 N/C
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10 GND
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11 N/C
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12 N/C
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--- ---------------------------
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JTAG Apapter:
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------- ----------- --------------- --------------------------------------
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JTAG 20-PIN DESCRIPTION NOTES
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SIGNAL CONNECTOR
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------- ----------- --------------- --------------------------------------
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Vcc 1, 2 Vcc
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nTRST 3 Reset Connect this pin to the (active
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low) reset input of the target MCU.
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Some JTAG adapters driver nTRST (high
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and low). Others can can configure
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nTRST as open collector (only drive
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low).
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GND 4, 6, 8, Ground
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10, 12, 14,
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16, 20
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TDI 5 JTAG Test Data Use 10K-100K Ohm pull-up resistor to
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Input VCC
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TMS 7 JTAG Test Mode Use 10K-100K Ohm pull-up resistor to
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Select VCC
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TCK 9 Clock into the Use 10K-100K Ohm pull-down resistor to
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core GND
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RTCK 11 Return clock Some JTAG adapters have adaptive clocking
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using an RTCK signal.
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DBGSEL 11 Debug Select Some devices have special pins that
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enable the JTAG interface. For example,
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on the NXP LPC2129 the signal RTCK must
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be driven low during RESET to enable the
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JTAG interface.
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TDO 13 JTAG Test Data Use 10K-100K Ohm pull-up resistor to VCC
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Output
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DBGRQ 17 N/C
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DGBACK 19 N/C
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ISP ?? ISP Most NXP MCU's have an ISP pin which
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(when pulled low) can be used to cause
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the MCU to enter a bootloader on reset.
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Use 10K-100K Ohm pull up resistor.
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------- ----------- --------------- --------------------------------------
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