f362d161db
arm: codestyle fixes 1
* arm: a1x: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arm: am335x: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arm: c5471: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arm: cxd56xx: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arm: dm320: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arm: efm32: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arm: imx6: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arm: imxrt: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* arm: kinetis: codestyle fixes
After the board restructuration is time for codestyle cleanup
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
166 lines
6.3 KiB
C
166 lines
6.3 KiB
C
/****************************************************************************
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* boards/arm/kinetis/twr-k64f120m/include/board.h
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*
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* Copyright (C) 2017 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#ifndef __BOARDS_ARM_KINETIS_TWR_K64F120M_INCLUDE_BOARCH_H
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#define __BOARDS_ARM_KINETIS_TWR_K64F120M_INCLUDE_BOARCH_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#ifndef __ASSEMBLY__
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# include <stdint.h>
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#endif
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Clocking *****************************************************************/
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/* The K64 tower board uses a 50MHz external clock */
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#define BOARD_EXTCLOCK 1 /* External clock */
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#define BOARD_EXTAL_FREQ 50000000 /* 50MHz Oscillator */
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#define BOARD_XTAL32_FREQ 32768 /* 32KHz RTC Oscillator */
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/* PLL Configuration.
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* Either the external clock or crystal frequency is used to select the
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* PRDIV value. Only reference clock frequencies are supported that will
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* produce a range 2MHz-4MHz reference clock to the PLL.
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*
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* PLL Input frequency: PLLIN = REFCLK/PRDIV = 50MHz/20 = 2.5 MHz
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* PLL Output frequency: PLLOUT = PLLIN*VDIV = 2.5Mhz*48 = 120MHz
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* MCG Frequency: PLLOUT = 120 Mhz
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*/
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#define BOARD_PRDIV 20 /* PLL External Reference Divider */
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#define BOARD_VDIV 48 /* PLL VCO Divider (frequency multiplier) */
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#define BOARD_PLLIN_FREQ (BOARD_EXTAL_FREQ / BOARD_PRDIV)
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#define BOARD_PLLOUT_FREQ (BOARD_PLLIN_FREQ * BOARD_VDIV)
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#define BOARD_MCG_FREQ BOARD_PLLOUT_FREQ
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/* Define additional MCG_C2 Setting */
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#define BOARD_MCG_C2_FCFTRIM 0 /* Do not enable FCFTRIM */
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#define BOARD_MCG_C2_LOCRE0 MCG_C2_LOCRE0 /* Enable reset on loss of clock */
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/* SIM CLKDIV1 dividers */
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#define BOARD_OUTDIV1 1 /* Core = MCG, 120MHz */
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#define BOARD_OUTDIV2 2 /* Bus = MCG/2, 60MHz */
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#define BOARD_OUTDIV3 2 /* FlexBus = MCG/2, 60MHz */
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#define BOARD_OUTDIV4 5 /* Flash clock = MCG/5, 24MHz */
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#define BOARD_CORECLK_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV1)
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#define BOARD_BUS_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV2)
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#define BOARD_FLEXBUS_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV3)
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#define BOARD_FLASHCLK_FREQ (BOARD_MCG_FREQ / BOARD_OUTDIV4)
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/* SDHC clocking ************************************************************/
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/* SDCLK configurations corresponding to various modes of operation.
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* Formula is:
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*
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* SDCLK frequency = (base clock) / (prescaler * divisor)
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*
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* The SDHC module is always configure configured so that the core clock is
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* the base clock.
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*/
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/* Identification mode: 375KHz = 120MHz / ( 64 * 5) <= 400 KHz */
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#define BOARD_SDHC_IDMODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV64
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#define BOARD_SDHC_IDMODE_DIVISOR SDHC_SYSCTL_DVS_DIV(5)
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/* MMC normal mode: 15MHz = 120MHz / (8 * 1) <= 16 MHz */
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#define BOARD_SDHC_MMCMODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV8
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#define BOARD_SDHC_MMCMODE_DIVISOR SDHC_SYSCTL_DVS_DIV(1)
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/* SD normal mode (1-bit): 15MHz = 120MHz / (8 * 1) <= 16 MHz */
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#define BOARD_SDHC_SD1MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV8
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#define BOARD_SDHC_SD1MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(1)
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/* SD normal mode (4-bit): 20MHz = 120MHz / (2 * 3) (with DMA) <= 24MHz
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* SD normal mode (4-bit): 15MHz = 120MHz / (8 * 1) (no DMA) <= 16MHz
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*/
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#ifdef CONFIG_SDIO_DMA
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# define BOARD_SDHC_SD4MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV2
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# define BOARD_SDHC_SD4MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(3)
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#else
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# define BOARD_SDHC_SD4MODE_PRESCALER SDHC_SYSCTL_SDCLKFS_DIV8
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# define BOARD_SDHC_SD4MODE_DIVISOR SDHC_SYSCTL_DVS_DIV(1)
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#endif
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/* LED definitions **********************************************************/
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/* The TWR-K64F120M has four LEDs:
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*
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* 1. D5 / Green LED PTE6
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* 2. D6 / Yellow LED PTE7
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* 3. D7 / Orange LED PTE8
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* 4 D9 / Blue LED PTE9
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*
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* LED4 is reservered for user.
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* The 3 first LEDs are encoded as follows:
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*/
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#define LED_STARTED 0 /* N/A */
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#define LED_HEAPALLOCATE 1 /* N/A */
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#define LED_IRQSENABLED 2 /* N/A */
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#define LED_STACKCREATED 3 /* LED1 - OS is started */
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#define LED_INIRQ 4 /* LED2 */
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#define LED_SIGNAL 5 /* LED3 */
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#define LED_ASSERTION 6 /* LED1 + LED2 + LED3 */
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#define LED_PANIC 7 /* LED1 (blink) */
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/* Open SDA serial link */
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#define PIN_UART1_RX PIN_UART1_RX_1
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#define PIN_UART1_TX PIN_UART1_TX_1
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/* Ethernet */
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#ifdef CONFIG_KINETIS_ENET
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# define CONFIG_KINETIS_NENET 1
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#endif
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#endif /* __BOARDS_ARM_KINETIS_TWR_K64F120M_INCLUDE_BOARCH_H */
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