a1c991d921
Move boards to boards folder
* boards: rename configs folder to boards
This is the proposed layout after the change:
boards: - folder containing board folders
<board>: - name of each board
drivers: - extra drivers specific for platform
include: - header files for the boars
scripts: - extra scripts specific for platform
src: - board specific code
tools: - extra tools specific for platform
<config>: - board specific configuration(s)
Note:
<xxx> names are dependent on platform
This is a logical change to aim to the arch layout but this is a
huge change it should be done in several steps to lower the risk.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* Kconfig: replace configs with boards
The change is needed after the path change
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* Makefile: replace configs with boards
The change is needed after the path change
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* Makefile.*: replace configs with boards
The change is needed after the path change
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* Make.defs: replace configs with boards
The change is needed after the path change
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* .sh: replace configs with boards
The change is needed after the path change
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* .mk: replace configs with boards
The change is needed after the path change
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* .c & .h: replace configs with boards
The change is needed after the path change
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
* .bat: replace configs with boards
The change is needed after the path change
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
29 lines
756 B
Plaintext
29 lines
756 B
Plaintext
README
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^^^^^^
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README for NuttX port to the SAM4CMP-DB board.
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http://www.atmel.com/tools/SAM4CMP-DB.aspx
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The board is intended to test NuttX SMP features for dual Cortex-M4.
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Settings
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^^^^^^^^
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1. Both CPUs are running at 92.160MHz with PLLB.
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2. Serial console can be used via on-board USB-UART (115200/8/N/1)
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3. Interrupt handlers such as timer and UART are handled on CPU0
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4. Both CPUs share internal SRAM0 (128KB)
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5. SRAM1 is used to boot CPU1.
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6. Cache controllers are disabled because of no snooping features.
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Status
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^^^^^^
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Currently SMP freature works on the board but is not stable.
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1. "nsh> sleep 1 &" works without crash.
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2. "nsh> smp " sometimes works but some assertions might happen.
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3. "nsh> ostest " causes deadlocks during the test.
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