89 lines
2.2 KiB
Plaintext
89 lines
2.2 KiB
Plaintext
############################################################################
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# arch/arm/src/stm32f0l0g0/Make.defs
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#
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# Licensed to the Apache Software Foundation (ASF) under one or more
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# contributor license agreements. See the NOTICE file distributed with
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# this work for additional information regarding copyright ownership. The
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# ASF licenses this file to you under the Apache License, Version 2.0 (the
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# "License"); you may not use this file except in compliance with the
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# License. You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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# License for the specific language governing permissions and limitations
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# under the License.
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#
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############################################################################
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include armv6-m/Make.defs
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CHIP_CSRCS = stm32_start.c stm32_gpio.c stm32_exti_gpio.c stm32_irq.c
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CHIP_CSRCS += stm32_lse.c stm32_lowputc.c stm32_serial.c stm32_rcc.c
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ifeq ($(CONFIG_STM32F0L0G0_DMA),y)
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CHIP_CSRCS += stm32_dma_v1.c
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endif
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ifeq ($(CONFIG_STM32F0L0G0_PWR),y)
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CHIP_CSRCS += stm32_pwr.c
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endif
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ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
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CHIP_CSRCS += stm32_idle.c
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endif
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ifneq ($(CONFIG_SCHED_TICKLESS),y)
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CHIP_CSRCS += stm32_timerisr.c
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endif
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ifeq ($(CONFIG_BUILD_PROTECTED),y)
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CHIP_CSRCS += stm32_userspace.c
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endif
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ifeq ($(CONFIG_STM32F0L0G0_GPIOIRQ),y)
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CHIP_CSRCS += stm32_gpioint.c
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endif
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ifeq ($(CONFIG_ARCH_IRQPRIO),y)
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CHIP_CSRCS += stm32_irqprio.c
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endif
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ifeq ($(CONFIG_STM32F0L0G0_HAVE_HSI48),y)
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CHIP_CSRCS += stm32_hsi48.c
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endif
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ifeq ($(CONFIG_STM32F0L0G0_USB),y)
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CHIP_CSRCS += stm32_usbdev.c
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endif
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ifeq ($(CONFIG_STM32F0L0G0_I2C),y)
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CHIP_CSRCS += stm32_i2c.c
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endif
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ifeq ($(CONFIG_STM32F0L0G0_SPI),y)
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CHIP_CSRCS += stm32_spi.c
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endif
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ifeq ($(CONFIG_STM32F0L0G0_PWM),y)
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CHIP_CSRCS += stm32_pwm.c
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endif
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ifeq ($(CONFIG_STM32F0L0G0_ADC),y)
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CHIP_CSRCS += stm32_adc.c
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endif
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ifeq ($(CONFIG_STM32F0L0G0_AES),y)
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CHIP_CSRCS += stm32_aes.c
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endif
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ifeq ($(CONFIG_STM32F0L0G0_RNG),y)
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CHIP_CSRCS += stm32_rng.c
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endif
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ifeq ($(CONFIG_STM32F0L0G0_TIM),y)
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CHIP_CSRCS += stm32_tim.c stm32_tim_lowerhalf.c
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endif
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