cpu0 cpu1: user_main signest_test sched_unlock nxsched_merge_pending nxsched_add_readytorun up_cpu_pause arm_sigdeliver enter_critical_section Reason: In the SMP, cpu0 is already in the critical section and waiting for cpu1 to enter the suspended state. However, when cpu1 executes arm_sigdeliver, it is in the irq-disabled state but not in the critical section. At this point, cpu1 is unable to respond to interrupts and is continuously attempting to enter the critical section, resulting in a deadlock. Resolve: adjust the logic, do not entering the critical section when interrupt-disabled. test: We can use qemu for testing. compiling make distclean -j20; ./tools/configure.sh -l qemu-armv8a:nsh_smp ;make -j20 running qemu-system-aarch64 -cpu cortex-a53 -smp 4 -nographic -machine virt,virtualization=on,gic-version=3 -net none -chardev stdio,id=con,mux=on -serial chardev:con -mon chardev=con,mode=readline -kernel ./nuttx Signed-off-by: hujun5 <hujun5@xiaomi.com>
167 lines
5.0 KiB
C
167 lines
5.0 KiB
C
/****************************************************************************
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* arch/arm/src/armv6-m/arm_sigdeliver.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <sched.h>
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#include <assert.h>
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#include <debug.h>
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#include <nuttx/irq.h>
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#include <nuttx/arch.h>
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#include <nuttx/board.h>
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#include <arch/board/board.h>
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#include "sched/sched.h"
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#include "arm_internal.h"
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: arm_sigdeliver
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*
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* Description:
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* This is the a signal handling trampoline. When a signal action was
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* posted. The task context was mucked with and forced to branch to this
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* location with interrupts disabled.
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*
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****************************************************************************/
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void arm_sigdeliver(void)
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{
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struct tcb_s *rtcb = this_task();
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uint32_t *regs = rtcb->xcp.saved_regs;
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#ifdef CONFIG_SMP
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/* In the SMP case, we must terminate the critical section while the signal
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* handler executes, but we also need to restore the irqcount when the
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* we resume the main thread of the task.
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*/
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int16_t saved_irqcount;
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#endif
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board_autoled_on(LED_SIGNAL);
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sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
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rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
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DEBUGASSERT(rtcb->xcp.sigdeliver != NULL);
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retry:
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#ifdef CONFIG_SMP
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/* In the SMP case, up_schedule_sigaction(0) will have incremented
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* 'irqcount' in order to force us into a critical section. Save the
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* pre-incremented irqcount.
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*/
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saved_irqcount = rtcb->irqcount;
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DEBUGASSERT(saved_irqcount >= 0);
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/* Now we need call leave_critical_section() repeatedly to get the irqcount
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* to zero, freeing all global spinlocks that enforce the critical section.
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*/
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while (rtcb->irqcount > 0)
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{
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leave_critical_section((uint16_t)regs[REG_PRIMASK]);
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}
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#endif /* CONFIG_SMP */
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#ifndef CONFIG_SUPPRESS_INTERRUPTS
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/* Then make sure that interrupts are enabled. Signal handlers must always
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* run with interrupts enabled.
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*/
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up_irq_enable();
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#endif
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/* Deliver the signal */
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((sig_deliver_t)rtcb->xcp.sigdeliver)(rtcb);
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/* Output any debug messages BEFORE restoring errno (because they may
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* alter errno), then disable interrupts again and restore the original
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* errno that is needed by the user logic (it is probably EINTR).
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*
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* I would prefer that all interrupts are disabled when
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* arm_fullcontextrestore() is called, but that may not be necessary.
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*/
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sinfo("Resuming\n");
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#ifdef CONFIG_SMP
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/* Restore the saved 'irqcount' and recover the critical section
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* spinlocks.
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*/
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DEBUGASSERT(rtcb->irqcount == 0);
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while (rtcb->irqcount < saved_irqcount + 1)
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{
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enter_critical_section();
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}
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#endif
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#ifndef CONFIG_SUPPRESS_INTERRUPTS
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up_irq_save();
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#endif
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if (!sq_empty(&rtcb->sigpendactionq) &&
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(rtcb->flags & TCB_FLAG_SIGNAL_ACTION) == 0)
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{
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#ifdef CONFIG_SMP
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leave_critical_section((uint16_t)regs[REG_PRIMASK]);
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#endif
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goto retry;
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}
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/* Modify the saved return state with the actual saved values in the
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* TCB. This depends on the fact that nested signal handling is
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* not supported. Therefore, these values will persist throughout the
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* signal handling action.
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*
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* Keeping this data in the TCB resolves a security problem in protected
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* and kernel mode: The regs[] array is visible on the user stack and
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* could be modified by a hostile program.
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*/
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rtcb->xcp.sigdeliver = NULL; /* Allows next handler to be scheduled */
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/* Then restore the correct state for this thread of
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* execution.
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*/
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board_autoled_off(LED_SIGNAL);
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#ifdef CONFIG_SMP
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/* We need to keep the IRQ lock until task switching */
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rtcb->irqcount++;
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leave_critical_section((uint16_t)regs[REG_PRIMASK]);
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rtcb->irqcount--;
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#endif
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arm_fullcontextrestore(regs);
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}
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