563 lines
19 KiB
C
563 lines
19 KiB
C
/****************************************************************************
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* arch/arm/src/stm32f0l0g0/stm32_pwm.h
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*
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* Copyright (C) 2019 Fundação CERTI. All rights reserved.
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* Author: Daniel Pereira Volpato <dpo@certi.org.br>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_STM32F0L0G0_STM32_PWM_H
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#define __ARCH_ARM_SRC_STM32F0L0G0_STM32_PWM_H
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/* The STM32F0L0G0 does not have dedicated PWM hardware. Rather, pulsed
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* output control is a capability of the STM32F0L0G0 timers. The logic in
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* this file implements the lower half of the standard, NuttX PWM interface
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* using the STM32F0L0G0 timers. That interface is described in
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* include/nuttx/timers/pwm.h.
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*/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <arch/board/board.h>
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#include <sys/param.h>
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#include "chip.h"
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#include "hardware/stm32_tim.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Configuration ************************************************************/
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/* Timer devices may be used for different purposes. One special purpose is
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* to generate modulated outputs for such things as motor control. If
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* CONFIG_STM32F0L0G0_TIMn is defined then the CONFIG_STM32F0L0G0_TIMn_PWM
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* must also be defined to indicate that timer "n" is intended to be used for
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* pulsed output signal generation.
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*/
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#ifndef CONFIG_STM32F0L0G0_TIM1
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# undef CONFIG_STM32F0L0G0_TIM1_PWM
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#endif
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#ifndef CONFIG_STM32F0L0G0_TIM2
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# undef CONFIG_STM32F0L0G0_TIM2_PWM
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#endif
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#ifndef CONFIG_STM32F0L0G0_TIM3
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# undef CONFIG_STM32F0L0G0_TIM3_PWM
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#endif
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#ifndef CONFIG_STM32F0L0G0_TIM14
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# undef CONFIG_STM32F0L0G0_TIM14_PWM
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#endif
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#ifndef CONFIG_STM32F0L0G0_TIM15
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# undef CONFIG_STM32F0L0G0_TIM15_PWM
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#endif
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#ifndef CONFIG_STM32F0L0G0_TIM16
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# undef CONFIG_STM32F0L0G0_TIM16_PWM
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#endif
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#ifndef CONFIG_STM32F0L0G0_TIM17
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# undef CONFIG_STM32F0L0G0_TIM17_PWM
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#endif
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/* The basic timers (timer 6 and 7)
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* are not capable of generating output pulses
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*/
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#undef CONFIG_STM32F0L0G0_TIM6_PWM
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#undef CONFIG_STM32F0L0G0_TIM7_PWM
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/* Check if PWM support for any channel is enabled. */
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#if defined(CONFIG_STM32F0L0G0_TIM1_PWM) || defined(CONFIG_STM32F0L0G0_TIM2_PWM) || \
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defined(CONFIG_STM32F0L0G0_TIM3_PWM) || defined(CONFIG_STM32F0L0G0_TIM14_PWM) || \
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defined(CONFIG_STM32F0L0G0_TIM15_PWM) || defined(CONFIG_STM32F0L0G0_TIM16_PWM) || \
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defined(CONFIG_STM32F0L0G0_TIM17_PWM)
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#ifdef CONFIG_PWM_MULTICHAN
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#ifdef CONFIG_STM32F0L0G0_TIM1_CHANNEL1
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# ifdef CONFIG_STM32F0L0G0_TIM1_CH1OUT
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# define PWM_TIM1_CH1CFG GPIO_TIM1_CH1OUT
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# else
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# define PWM_TIM1_CH1CFG 0
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# endif
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# ifdef CONFIG_STM32F0L0G0_TIM1_CH1NOUT
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# define PWM_TIM1_CH1NCFG GPIO_TIM1_CH1NOUT
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# else
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# define PWM_TIM1_CH1NCFG 0
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# endif
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# define PWM_TIM1_CHANNEL1 1
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#else
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# define PWM_TIM1_CHANNEL1 0
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#endif
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#ifdef CONFIG_STM32F0L0G0_TIM1_CHANNEL2
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# ifdef CONFIG_STM32F0L0G0_TIM1_CH2OUT
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# define PWM_TIM1_CH2CFG GPIO_TIM1_CH2OUT
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# else
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# define PWM_TIM1_CH2CFG 0
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# endif
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# ifdef CONFIG_STM32F0L0G0_TIM1_CH2NOUT
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# define PWM_TIM1_CH2NCFG GPIO_TIM1_CH2NOUT
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# else
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# define PWM_TIM1_CH2NCFG 0
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# endif
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# define PWM_TIM1_CHANNEL2 1
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#else
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# define PWM_TIM1_CHANNEL2 0
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#endif
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#ifdef CONFIG_STM32F0L0G0_TIM1_CHANNEL3
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# ifdef CONFIG_STM32F0L0G0_TIM1_CH3OUT
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# define PWM_TIM1_CH3CFG GPIO_TIM1_CH3OUT
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# else
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# define PWM_TIM1_CH3CFG 0
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# endif
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# ifdef CONFIG_STM32F0L0G0_TIM1_CH3NOUT
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# define PWM_TIM1_CH3NCFG GPIO_TIM1_CH3NOUT
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# else
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# define PWM_TIM1_CH3NCFG 0
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# endif
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# define PWM_TIM1_CHANNEL3 1
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#else
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# define PWM_TIM1_CHANNEL3 0
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#endif
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#ifdef CONFIG_STM32F0L0G0_TIM1_CHANNEL4
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# ifdef CONFIG_STM32F0L0G0_TIM1_CH4OUT
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# define PWM_TIM1_CH4CFG GPIO_TIM1_CH4OUT
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# else
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# define PWM_TIM1_CH4CFG 0
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# endif
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# define PWM_TIM1_CHANNEL4 1
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#else
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# define PWM_TIM1_CHANNEL4 0
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#endif
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#define PWM_TIM1_NCHANNELS (PWM_TIM1_CHANNEL1 + PWM_TIM1_CHANNEL2 + \
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PWM_TIM1_CHANNEL3 + PWM_TIM1_CHANNEL4)
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#ifdef CONFIG_STM32F0L0G0_TIM2_CHANNEL1
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# ifdef CONFIG_STM32F0L0G0_TIM2_CH1OUT
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# define PWM_TIM2_CH1CFG GPIO_TIM2_CH1OUT
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# else
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# define PWM_TIM2_CH1CFG 0
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# endif
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# define PWM_TIM2_CHANNEL1 1
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#else
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# define PWM_TIM2_CHANNEL1 0
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#endif
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#ifdef CONFIG_STM32F0L0G0_TIM2_CHANNEL2
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# ifdef CONFIG_STM32F0L0G0_TIM2_CH2OUT
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# define PWM_TIM2_CH2CFG GPIO_TIM2_CH2OUT
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# else
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# define PWM_TIM2_CH2CFG 0
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# endif
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# define PWM_TIM2_CHANNEL2 1
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#else
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# define PWM_TIM2_CHANNEL2 0
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#endif
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#ifdef CONFIG_STM32F0L0G0_TIM2_CHANNEL3
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# ifdef CONFIG_STM32F0L0G0_TIM2_CH3OUT
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# define PWM_TIM2_CH3CFG GPIO_TIM2_CH3OUT
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# else
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# define PWM_TIM2_CH3CFG 0
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# endif
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# define PWM_TIM2_CHANNEL3 1
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#else
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# define PWM_TIM2_CHANNEL3 0
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#endif
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#ifdef CONFIG_STM32F0L0G0_TIM2_CHANNEL4
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# ifdef CONFIG_STM32F0L0G0_TIM2_CH4OUT
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# define PWM_TIM2_CH4CFG GPIO_TIM2_CH4OUT
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# else
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# define PWM_TIM2_CH4CFG 0
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# endif
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# define PWM_TIM2_CHANNEL4 1
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#else
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# define PWM_TIM2_CHANNEL4 0
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#endif
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#define PWM_TIM2_NCHANNELS (PWM_TIM2_CHANNEL1 + PWM_TIM2_CHANNEL2 + \
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PWM_TIM2_CHANNEL3 + PWM_TIM2_CHANNEL4)
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#ifdef CONFIG_STM32F0L0G0_TIM3_CHANNEL1
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# ifdef CONFIG_STM32F0L0G0_TIM3_CH1OUT
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# define PWM_TIM3_CH1CFG GPIO_TIM3_CH1OUT
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# else
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# define PWM_TIM3_CH1CFG 0
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# endif
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# define PWM_TIM3_CHANNEL1 1
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#else
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# define PWM_TIM3_CHANNEL1 0
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#endif
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#ifdef CONFIG_STM32F0L0G0_TIM3_CHANNEL2
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# ifdef CONFIG_STM32F0L0G0_TIM3_CH2OUT
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# define PWM_TIM3_CH2CFG GPIO_TIM3_CH2OUT
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# else
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# define PWM_TIM3_CH2CFG 0
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# endif
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# define PWM_TIM3_CHANNEL2 1
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#else
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# define PWM_TIM3_CHANNEL2 0
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#endif
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#ifdef CONFIG_STM32F0L0G0_TIM3_CHANNEL3
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# ifdef CONFIG_STM32F0L0G0_TIM3_CH3OUT
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# define PWM_TIM3_CH3CFG GPIO_TIM3_CH3OUT
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# else
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# define PWM_TIM3_CH3CFG 0
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# endif
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# define PWM_TIM3_CHANNEL3 1
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#else
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# define PWM_TIM3_CHANNEL3 0
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#endif
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#ifdef CONFIG_STM32F0L0G0_TIM3_CHANNEL4
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# ifdef CONFIG_STM32F0L0G0_TIM3_CH4OUT
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# define PWM_TIM3_CH4CFG GPIO_TIM3_CH4OUT
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# else
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# define PWM_TIM3_CH4CFG 0
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# endif
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# define PWM_TIM3_CHANNEL4 1
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#else
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# define PWM_TIM3_CHANNEL4 0
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#endif
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#define PWM_TIM3_NCHANNELS (PWM_TIM3_CHANNEL1 + PWM_TIM3_CHANNEL2 + \
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PWM_TIM3_CHANNEL3 + PWM_TIM3_CHANNEL4)
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#ifdef CONFIG_STM32F0L0G0_TIM14_CHANNEL1
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# ifdef CONFIG_STM32F0L0G0_TIM14_CH1OUT
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# define PWM_TIM14_CH1CFG GPIO_TIM14_CH1OUT
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# else
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# define PWM_TIM14_CH1CFG 0
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# endif
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# ifdef CONFIG_STM32F0L0G0_TIM14_CH1NOUT
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# define PWM_TIM14_CH1NCFG GPIO_TIM14_CH1NOUT
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# else
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# define PWM_TIM14_CH1NCFG 0
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# endif
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# define PWM_TIM14_CHANNEL1 1
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#else
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# define PWM_TIM14_CHANNEL1 0
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#endif
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#define PWM_TIM14_NCHANNELS PWM_TIM14_CHANNEL1
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#ifdef CONFIG_STM32F0L0G0_TIM15_CHANNEL1
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# ifdef CONFIG_STM32F0L0G0_TIM15_CH1OUT
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# define PWM_TIM15_CH1CFG GPIO_TIM15_CH1OUT
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# else
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# define PWM_TIM15_CH1CFG 0
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# endif
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# ifdef CONFIG_STM32F0L0G0_TIM15_CH1NOUT
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# define PWM_TIM15_CH1NCFG GPIO_TIM15_CH1NOUT
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# else
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# define PWM_TIM15_CH1NCFG 0
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# endif
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# define PWM_TIM15_CHANNEL1 1
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#else
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# define PWM_TIM15_CHANNEL1 0
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#endif
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#ifdef CONFIG_STM32F0L0G0_TIM15_CHANNEL2
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# ifdef CONFIG_STM32F0L0G0_TIM15_CH2OUT
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# define PWM_TIM15_CH2CFG GPIO_TIM15_CH2OUT
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# else
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# define PWM_TIM15_CH2CFG 0
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# endif
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# define PWM_TIM15_CHANNEL2 1
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#else
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# define PWM_TIM15_CHANNEL2 0
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#endif
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#define PWM_TIM15_NCHANNELS (PWM_TIM15_CHANNEL1 + PWM_TIM15_CHANNEL2)
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#ifdef CONFIG_STM32F0L0G0_TIM16_CHANNEL1
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# ifdef CONFIG_STM32F0L0G0_TIM16_CH1OUT
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# define PWM_TIM16_CH1CFG GPIO_TIM16_CH1OUT
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# else
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# define PWM_TIM16_CH1CFG 0
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# endif
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# ifdef CONFIG_STM32F0L0G0_TIM16_CH1NOUT
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# define PWM_TIM16_CH1NCFG GPIO_TIM16_CH1NOUT
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# else
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# define PWM_TIM16_CH1NCFG 0
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# endif
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# define PWM_TIM16_CHANNEL1 1
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#else
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# define PWM_TIM16_CHANNEL1 0
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#endif
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#define PWM_TIM16_NCHANNELS PWM_TIM16_CHANNEL1
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#ifdef CONFIG_STM32F0L0G0_TIM17_CHANNEL1
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# ifdef CONFIG_STM32F0L0G0_TIM17_CH1OUT
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# define PWM_TIM17_CH1CFG GPIO_TIM17_CH1OUT
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# else
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# define PWM_TIM17_CH1CFG 0
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# endif
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# ifdef CONFIG_STM32F0L0G0_TIM17_CH1NOUT
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# define PWM_TIM17_CH1NCFG GPIO_TIM17_CH1NOUT
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# else
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# define PWM_TIM17_CH1NCFG 0
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# endif
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# define PWM_TIM17_CHANNEL1 1
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#else
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# define PWM_TIM17_CHANNEL1 0
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#endif
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#define PWM_TIM17_NCHANNELS PWM_TIM17_CHANNEL1
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#define PWM_NCHANNELS MAX(PWM_TIM1_NCHANNELS, \
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MAX(PWM_TIM2_NCHANNELS, \
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MAX(PWM_TIM3_NCHANNELS, \
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MAX(PWM_TIM14_NCHANNELS, \
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MAX(PWM_TIM15_NCHANNELS, \
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MAX(PWM_TIM16_NCHANNELS, \
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PWM_TIM17_NCHANNELS))))))
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#else /* !CONFIG_PWM_MULTICHAN */
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/* For each timer that is enabled for PWM usage, we need the following
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* additional configuration settings:
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*
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* CONFIG_STM32F0L0G0_TIMx_CHANNEL - Specifies the timer output channel
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* {1,..,4} PWM_TIMx_CHn - One of the values defined in
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* chip/stm32*_pinmap.h. In the case where there are multiple pin
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* selections, the correct setting must be provided in the arch/board/board.h
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* file.
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*
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* NOTE: The STM32 timers are each capable of generating different signals on
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* each of the four channels with different duty cycles. That capability is
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* not supported by this driver: Only one output channel per timer.
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*/
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#ifdef CONFIG_STM32F0L0G0_TIM1_PWM
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# if !defined(CONFIG_STM32F0L0G0_TIM1_CHANNEL)
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# error "CONFIG_STM32F0L0G0_TIM1_CHANNEL must be provided"
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# elif CONFIG_STM32F0L0G0_TIM1_CHANNEL == 1
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# define CONFIG_STM32F0L0G0_TIM1_CHANNEL1 1
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# define CONFIG_STM32F0L0G0_TIM1_CH1MODE CONFIG_STM32F0L0G0_TIM1_CHMODE
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# define PWM_TIM1_CH1CFG GPIO_TIM1_CH1OUT
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# define PWM_TIM1_CH1NCFG 0
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# elif CONFIG_STM32F0L0G0_TIM1_CHANNEL == 2
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# define CONFIG_STM32F0L0G0_TIM1_CHANNEL2 1
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# define CONFIG_STM32F0L0G0_TIM1_CH2MODE CONFIG_STM32F0L0G0_TIM1_CHMODE
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# define PWM_TIM1_CH2CFG GPIO_TIM1_CH2OUT
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# define PWM_TIM1_CH2NCFG 0
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# elif CONFIG_STM32F0L0G0_TIM1_CHANNEL == 3
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# define CONFIG_STM32F0L0G0_TIM1_CHANNEL3 1
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# define CONFIG_STM32F0L0G0_TIM1_CH3MODE CONFIG_STM32F0L0G0_TIM1_CHMODE
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# define PWM_TIM1_CH3CFG GPIO_TIM1_CH3OUT
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# define PWM_TIM1_CH3NCFG 0
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# elif CONFIG_STM32F0L0G0_TIM1_CHANNEL == 4
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# define CONFIG_STM32F0L0G0_TIM1_CHANNEL4 1
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# define CONFIG_STM32F0L0G0_TIM1_CH4MODE CONFIG_STM32F0L0G0_TIM1_CHMODE
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# define PWM_TIM1_CH4CFG GPIO_TIM1_CH4OUT
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# else
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# error "Unsupported value of CONFIG_STM32F0L0G0_TIM1_CHANNEL"
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# endif
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#endif
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#ifdef CONFIG_STM32F0L0G0_TIM2_PWM
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# if !defined(CONFIG_STM32F0L0G0_TIM2_CHANNEL)
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# error "CONFIG_STM32F0L0G0_TIM2_CHANNEL must be provided"
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# elif CONFIG_STM32F0L0G0_TIM2_CHANNEL == 1
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# define CONFIG_STM32F0L0G0_TIM2_CHANNEL1 1
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# define CONFIG_STM32F0L0G0_TIM2_CH1MODE CONFIG_STM32F0L0G0_TIM2_CHMODE
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# define PWM_TIM2_CH1CFG GPIO_TIM2_CH1OUT
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# elif CONFIG_STM32F0L0G0_TIM2_CHANNEL == 2
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# define CONFIG_STM32F0L0G0_TIM2_CHANNEL2 1
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# define CONFIG_STM32F0L0G0_TIM2_CH2MODE CONFIG_STM32F0L0G0_TIM2_CHMODE
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# define PWM_TIM2_CH2CFG GPIO_TIM2_CH2OUT
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# elif CONFIG_STM32F0L0G0_TIM2_CHANNEL == 3
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# define CONFIG_STM32F0L0G0_TIM2_CHANNEL3 1
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# define CONFIG_STM32F0L0G0_TIM2_CH3MODE CONFIG_STM32F0L0G0_TIM2_CHMODE
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# define PWM_TIM2_CH3CFG GPIO_TIM2_CH3OUT
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# elif CONFIG_STM32F0L0G0_TIM2_CHANNEL == 4
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# define CONFIG_STM32F0L0G0_TIM2_CHANNEL4 1
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# define CONFIG_STM32F0L0G0_TIM2_CH4MODE CONFIG_STM32F0L0G0_TIM2_CHMODE
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# define PWM_TIM2_CH4CFG GPIO_TIM2_CH4OUT
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# else
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# error "Unsupported value of CONFIG_STM32F0L0G0_TIM2_CHANNEL"
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# endif
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#endif
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#ifdef CONFIG_STM32F0L0G0_TIM3_PWM
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# if !defined(CONFIG_STM32F0L0G0_TIM3_CHANNEL)
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# error "CONFIG_STM32F0L0G0_TIM3_CHANNEL must be provided"
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# elif CONFIG_STM32F0L0G0_TIM3_CHANNEL == 1
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# define CONFIG_STM32F0L0G0_TIM3_CHANNEL1 1
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# define CONFIG_STM32F0L0G0_TIM3_CH1MODE CONFIG_STM32F0L0G0_TIM3_CHMODE
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# define PWM_TIM3_CH1CFG GPIO_TIM3_CH1OUT
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# elif CONFIG_STM32F0L0G0_TIM3_CHANNEL == 2
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# define CONFIG_STM32F0L0G0_TIM3_CHANNEL2 1
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# define CONFIG_STM32F0L0G0_TIM3_CH2MODE CONFIG_STM32F0L0G0_TIM3_CHMODE
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# define PWM_TIM3_CH2CFG GPIO_TIM3_CH2OUT
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# elif CONFIG_STM32F0L0G0_TIM3_CHANNEL == 3
|
|
# define CONFIG_STM32F0L0G0_TIM3_CHANNEL3 1
|
|
# define CONFIG_STM32F0L0G0_TIM3_CH3MODE CONFIG_STM32F0L0G0_TIM3_CHMODE
|
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# define PWM_TIM3_CH3CFG GPIO_TIM3_CH3OUT
|
|
# elif CONFIG_STM32F0L0G0_TIM3_CHANNEL == 4
|
|
# define CONFIG_STM32F0L0G0_TIM3_CHANNEL4 1
|
|
# define CONFIG_STM32F0L0G0_TIM3_CH4MODE CONFIG_STM32F0L0G0_TIM3_CHMODE
|
|
# define PWM_TIM3_CH4CFG GPIO_TIM3_CH4OUT
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|
# else
|
|
# error "Unsupported value of CONFIG_STM32F0L0G0_TIM3_CHANNEL"
|
|
# endif
|
|
#endif
|
|
|
|
#ifdef CONFIG_STM32F0L0G0_TIM14_PWM
|
|
# if !defined(CONFIG_STM32F0L0G0_TIM14_CHANNEL)
|
|
# error "CONFIG_STM32F0L0G0_TIM14_CHANNEL must be provided"
|
|
# elif CONFIG_STM32F0L0G0_TIM14_CHANNEL == 1
|
|
# define CONFIG_STM32F0L0G0_TIM14_CHANNEL1 1
|
|
# define CONFIG_STM32F0L0G0_TIM14_CH1MODE CONFIG_STM32F0L0G0_TIM14_CHMODE
|
|
# define PWM_TIM14_CH1CFG GPIO_TIM14_CH1OUT
|
|
# define PWM_TIM14_CH1NCFG 0
|
|
# else
|
|
# error "Unsupported value of CONFIG_STM32F0L0G0_TIM14_CHANNEL"
|
|
# endif
|
|
#endif
|
|
|
|
#ifdef CONFIG_STM32F0L0G0_TIM15_PWM
|
|
# if !defined(CONFIG_STM32F0L0G0_TIM15_CHANNEL)
|
|
# error "CONFIG_STM32F0L0G0_TIM15_CHANNEL must be provided"
|
|
# elif CONFIG_STM32F0L0G0_TIM15_CHANNEL == 1
|
|
# define CONFIG_STM32F0L0G0_TIM15_CHANNEL1 1
|
|
# define CONFIG_STM32F0L0G0_TIM15_CH1MODE CONFIG_STM32F0L0G0_TIM15_CHMODE
|
|
# define PWM_TIM15_CH1CFG GPIO_TIM15_CH1OUT
|
|
# define PWM_TIM15_CH1NCFG 0
|
|
# elif CONFIG_STM32F0L0G0_TIM15_CHANNEL == 2
|
|
# define CONFIG_STM32F0L0G0_TIM15_CHANNEL2 1
|
|
# define CONFIG_STM32F0L0G0_TIM15_CH2MODE CONFIG_STM32F0L0G0_TIM15_CHMODE
|
|
# define PWM_TIM15_CH2CFG GPIO_TIM15_CH2OUT
|
|
# else
|
|
# error "Unsupported value of CONFIG_STM32F0L0G0_TIM15_CHANNEL"
|
|
# endif
|
|
#endif
|
|
|
|
#ifdef CONFIG_STM32F0L0G0_TIM16_PWM
|
|
# if !defined(CONFIG_STM32F0L0G0_TIM16_CHANNEL)
|
|
# error "CONFIG_STM32F0L0G0_TIM16_CHANNEL must be provided"
|
|
# elif CONFIG_STM32F0L0G0_TIM16_CHANNEL == 1
|
|
# define CONFIG_STM32F0L0G0_TIM16_CHANNEL1 1
|
|
# define CONFIG_STM32F0L0G0_TIM16_CH1MODE CONFIG_STM32F0L0G0_TIM16_CHMODE
|
|
# define PWM_TIM16_CH1CFG GPIO_TIM16_CH1OUT
|
|
# define PWM_TIM16_CH1NCFG 0
|
|
# else
|
|
# error "Unsupported value of CONFIG_STM32F0L0G0_TIM16_CHANNEL"
|
|
# endif
|
|
#endif
|
|
|
|
#ifdef CONFIG_STM32F0L0G0_TIM17_PWM
|
|
# if !defined(CONFIG_STM32F0L0G0_TIM17_CHANNEL)
|
|
# error "CONFIG_STM32F0L0G0_TIM17_CHANNEL must be provided"
|
|
# elif CONFIG_STM32F0L0G0_TIM17_CHANNEL == 1
|
|
# define CONFIG_STM32F0L0G0_TIM17_CHANNEL1 1
|
|
# define CONFIG_STM32F0L0G0_TIM17_CH1MODE CONFIG_STM32F0L0G0_TIM17_CHMODE
|
|
# define PWM_TIM17_CH1CFG GPIO_TIM17_CH1OUT
|
|
# define PWM_TIM17_CH1NCFG 0
|
|
# else
|
|
# error "Unsupported value of CONFIG_STM32F0L0G0_TIM17_CHANNEL"
|
|
# endif
|
|
#endif
|
|
|
|
#define PWM_NCHANNELS 1
|
|
|
|
#endif
|
|
|
|
/* Complementary outputs support */
|
|
|
|
#if defined(CONFIG_STM32F0L0G0_TIM1_CH1NOUT) || defined(CONFIG_STM32F0L0G0_TIM1_CH2NOUT) || \
|
|
defined(CONFIG_STM32F0L0G0_TIM1_CH3NOUT)
|
|
# define HAVE_TIM1_COMPLEMENTARY
|
|
#endif
|
|
#if defined(CONFIG_STM32F0L0G0_TIM15_CH1NOUT)
|
|
# define HAVE_TIM15_COMPLEMENTARY
|
|
#endif
|
|
#if defined(CONFIG_STM32F0L0G0_TIM16_CH1NOUT)
|
|
# define HAVE_TIM16_COMPLEMENTARY
|
|
#endif
|
|
#if defined(CONFIG_STM32F0L0G0_TIM17_CH1NOUT)
|
|
# define HAVE_TIM17_COMPLEMENTARY
|
|
#endif
|
|
#if defined(HAVE_TIM1_COMPLEMENTARY) || defined(HAVE_TIM8_COMPLEMENTARY) || \
|
|
defined(HAVE_TIM15_COMPLEMENTARY) || defined(HAVE_TIM16_COMPLEMENTARY) || \
|
|
defined(HAVE_TIM17_COMPLEMENTARY)
|
|
# define HAVE_PWM_COMPLEMENTARY
|
|
#endif
|
|
|
|
/****************************************************************************
|
|
* Public Types
|
|
****************************************************************************/
|
|
|
|
/****************************************************************************
|
|
* Public Data
|
|
****************************************************************************/
|
|
|
|
#ifndef __ASSEMBLY__
|
|
|
|
#undef EXTERN
|
|
#if defined(__cplusplus)
|
|
#define EXTERN extern "C"
|
|
extern "C"
|
|
{
|
|
#else
|
|
#define EXTERN extern
|
|
#endif
|
|
|
|
/****************************************************************************
|
|
* Public Functions Prototypes
|
|
****************************************************************************/
|
|
|
|
/****************************************************************************
|
|
* Name: stm32_pwminitialize
|
|
*
|
|
* Description:
|
|
* Initialize one timer for use with the upper_level PWM driver.
|
|
*
|
|
* Input Parameters:
|
|
* timer - A number identifying the timer use. The number of valid timer
|
|
* IDs varies with the STM32 MCU and MCU family but is somewhere in
|
|
* the range of {1,..,17}.
|
|
*
|
|
* Returned Value:
|
|
* On success, a pointer to the STM32 lower half PWM driver is returned.
|
|
* NULL is returned on any failure.
|
|
*
|
|
****************************************************************************/
|
|
|
|
struct pwm_lowerhalf_s *stm32_pwminitialize(int timer);
|
|
|
|
#undef EXTERN
|
|
#if defined(__cplusplus)
|
|
}
|
|
#endif
|
|
|
|
#endif /* __ASSEMBLY__ */
|
|
|
|
#endif /* CONFIG_STM32F0L0G0_TIMx_PWM */
|
|
|
|
#endif /* __ARCH_ARM_SRC_STM32F0L0G0_STM32_PWM_H */
|