125 lines
4.3 KiB
C
125 lines
4.3 KiB
C
/****************************************************************************
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* arch/arm/src/rp2040/rp2040_pll.c
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*
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* Based upon the software originally developed by
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* Raspberry Pi (Trading) Ltd.
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*
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* Copyright 2020 (c) 2020 Raspberry Pi (Trading) Ltd.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <assert.h>
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#include <debug.h>
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#include <nuttx/arch.h>
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#include <arch/board/board.h>
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#include "arm_arch.h"
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#include "chip.h"
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#include "rp2040_pll.h"
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#include "hardware/rp2040_pll.h"
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: rp2040_pll_init
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*
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* Description:
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* Initialize PLL.
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*
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****************************************************************************/
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void rp2040_pll_init(uint32_t base, uint32_t refdiv, uint32_t vco_freq,
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uint32_t post_div1, uint8_t post_div2)
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{
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/* Turn off PLL in case it is already running */
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putreg32(0xffffffff, base + RP2040_PLL_PWR_OFFSET);
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putreg32(0, base + RP2040_PLL_FBDIV_INT_OFFSET);
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uint32_t ref_mhz = BOARD_XOSC_FREQ / refdiv;
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putreg32(refdiv, base + RP2040_PLL_CS_OFFSET);
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/* What are we multiplying the reference clock by to get the vco freq
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* (The regs are called div, because you divide the vco output and compare
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* it to the refclk)
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*/
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uint32_t fbdiv = vco_freq / ref_mhz;
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/* Check parameter ranges */
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assert(fbdiv >= 16 && fbdiv <= 320);
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assert((post_div1 >= 1 && post_div1 <= 7) &&
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(post_div2 >= 1 && post_div2 <= 7));
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assert(post_div2 <= post_div1);
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assert(ref_mhz <= (vco_freq / 16));
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/* Put calculated value into feedback divider */
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putreg32(fbdiv, base + RP2040_PLL_FBDIV_INT_OFFSET);
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/* Turn on PLL */
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clrbits_reg32(RP2040_PLL_PWR_PD | RP2040_PLL_PWR_VCOPD,
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base + RP2040_PLL_PWR_OFFSET);
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/* Wait for PLL to lock */
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while (!(getreg32(base + RP2040_PLL_CS_OFFSET) & RP2040_PLL_CS_LOCK))
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;
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/* Set up post dividers */
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putreg32((post_div1 << RP2040_PLL_PRIM_POSTDIV1_SHIFT) |
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(post_div2 << RP2040_PLL_PRIM_POSTDIV2_SHIFT),
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base + RP2040_PLL_PRIM_OFFSET);
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/* Turn on post divider */
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clrbits_reg32(RP2040_PLL_PWR_POSTDIVPD, base + RP2040_PLL_PWR_OFFSET);
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}
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