fca329945b
sam_i2cbus_initialize sam_i2cbus_uninitialize sam_i2cbus_initialize Or twi_reset is called. I found this a while back in the stm32 family, so there may be more arch-es with this sort of bug. I suppose any driver that has the notion of "do not set the freq if it is already set" could be suspect.
1055 lines
28 KiB
C
1055 lines
28 KiB
C
/****************************************************************************
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* arch/arm/src/sam34/sam_twi.c
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*
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* Copyright (C) 2013, 2015-2016 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* References:
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* SAMA34 Series Data Sheet
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* Atmel NoOS sample code.
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*
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* The Atmel sample code has a BSD compatible license that requires this
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* copyright notice:
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*
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* Copyright (c) 2011, Atmel Corporation
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX, Atmel, nor the names of its contributors may
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* be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/wdog.h>
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#include <nuttx/arch.h>
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#include <nuttx/i2c/i2c_master.h>
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#include <nuttx/irq.h>
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#include <arch/board/board.h>
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#include "up_arch.h"
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#include "chip/sam_pmc.h"
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#include "chip/sam_pinmap.h"
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#include "sam_periphclks.h"
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#include "sam_gpio.h"
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#include "sam_twi.h"
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#if defined(CONFIG_SAM34_TWI0) || defined(CONFIG_SAM34_TWI1)
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Configuration ***************************************************************/
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#ifndef CONFIG_SAM34_TWI0_FREQUENCY
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# define CONFIG_SAM34_TWI0_FREQUENCY 100000
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#endif
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#ifndef CONFIG_SAM34_TWI1_FREQUENCY
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# define CONFIG_SAM34_TWI1_FREQUENCY 100000
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#endif
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/* Driver internal definitions *************************************************/
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#define TWI_TIMEOUT ((100 * CLK_TCK) / 1000) /* 100 mS */
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/* Clocking to the TWO module(s) is provided by the main clocked, divided down
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* as necessary.
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*/
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#define TWI_MAX_FREQUENCY 66000000 /* Maximum TWI frequency */
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/* Debug ***********************************************************************/
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/* CONFIG_DEBUG_I2C + CONFIG_DEBUG enables general I2C debug output. */
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#ifdef CONFIG_DEBUG_I2C
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# define i2cdbg dbg
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# define i2cvdbg vdbg
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# define i2clldbg lldbg
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# define i2cllvdbg llvdbg
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#else
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# define i2cdbg(x...)
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# define i2cvdbg(x...)
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# define i2clldbg(x...)
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# define i2cllvdbg(x...)
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#endif
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/****************************************************************************
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* Private Types
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****************************************************************************/
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struct twi_dev_s
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{
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struct i2c_master_s dev; /* Generic I2C device */
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struct i2c_msg_s *msg; /* Message list */
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uintptr_t base; /* Base address of registers */
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uint32_t clkin; /* TWI input clock frequency */
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uint32_t i2cfreq; /* Selected TWI frequency */
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uint16_t irq; /* IRQ number for this device */
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uint8_t msgc; /* Number of message in the message list */
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uint8_t twi; /* TWI peripheral number (for debug output) */
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uint8_t pid; /* TWI peripheral ID */
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sem_t exclsem; /* Only one thread can access at a time */
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sem_t waitsem; /* Wait for TWI transfer completion */
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WDOG_ID timeout; /* Watchdog to recover from bus hangs */
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volatile int result; /* The result of the transfer */
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volatile int xfrd; /* Number of bytes transfers */
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/* Debug stuff */
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#ifdef CONFIG_SAM34_TWI_REGDEBUG
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bool wrlast; /* Last was a write */
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uint32_t addrlast; /* Last address */
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uint32_t vallast; /* Last value */
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int ntimes; /* Number of times */
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#endif
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};
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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/* Low-level helper functions */
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static void twi_takesem(sem_t *sem);
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#define twi_givesem(sem) (sem_post(sem))
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#ifdef CONFIG_SAM34_TWI_REGDEBUG
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static bool twi_checkreg(struct twi_dev_s *priv, bool wr,
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uint32_t value, uintptr_t address);
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static uint32_t twi_getabs(struct twi_dev_s *priv, uintptr_t address);
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static void twi_putabs(struct twi_dev_s *priv, uintptr_t address,
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uint32_t value);
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#else
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# define twi_checkreg(priv,wr,value,address) (false)
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# define twi_putabs(p,a,v) putreg32(v,a)
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# define twi_getabs(p,a) getreg32(a)
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#endif
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static inline uint32_t twi_getrel(struct twi_dev_s *priv,
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unsigned int offset);
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static inline void twi_putrel(struct twi_dev_s *priv, unsigned int offset,
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uint32_t value);
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/* I2C transfer helper functions */
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static int twi_wait(struct twi_dev_s *priv);
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static void twi_wakeup(struct twi_dev_s *priv, int result);
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static int twi_interrupt(struct twi_dev_s *priv);
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#ifdef CONFIG_SAM34_TWI0
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static int twi0_interrupt(int irq, FAR void *context);
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#endif
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#ifdef CONFIG_SAM34_TWI1
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static int twi1_interrupt(int irq, FAR void *context);
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#endif
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static void twi_timeout(int argc, uint32_t arg, ...);
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static void twi_startread(struct twi_dev_s *priv, struct i2c_msg_s *msg);
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static void twi_startwrite(struct twi_dev_s *priv, struct i2c_msg_s *msg);
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static void twi_startmessage(struct twi_dev_s *priv, struct i2c_msg_s *msg);
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/* I2C device operations */
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static int twi_transfer(FAR struct i2c_master_s *dev,
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FAR struct i2c_msg_s *msgs, int count);
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#ifdef CONFIG_I2C_RESET
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static int twi_reset(FAR struct i2c_master_s * dev);
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#endif
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/* Initialization */
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static void twi_setfrequency(struct twi_dev_s *priv, uint32_t frequency);
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static void twi_hw_initialize(struct twi_dev_s *priv, unsigned int pid,
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uint32_t frequency);
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/****************************************************************************
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* Private Data
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****************************************************************************/
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#ifdef CONFIG_SAM34_TWI0
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static struct twi_dev_s g_twi0;
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#endif
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#ifdef CONFIG_SAM34_TWI1
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static struct twi_dev_s g_twi1;
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#endif
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static const struct i2c_ops_s g_twiops =
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{
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.transfer = twi_transfer
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#ifdef CONFIG_I2C_RESET
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, .reset = twi_reset
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#endif
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};
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/****************************************************************************
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* Low-level Helpers
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****************************************************************************/
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/****************************************************************************
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* Name: twi_takesem
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*
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* Description:
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* Take the wait semaphore (handling false alarm wake-ups due to the receipt
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* of signals).
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*
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* Input Parameters:
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* dev - Instance of the SDIO device driver state structure.
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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static void twi_takesem(sem_t *sem)
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{
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/* Take the semaphore (perhaps waiting) */
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while (sem_wait(sem) != 0)
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{
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/* The only case that an error should occr here is if the wait was
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* awakened by a signal.
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*/
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ASSERT(errno == EINTR);
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}
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}
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/****************************************************************************
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* Name: twi_checkreg
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*
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* Description:
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* Check if the current register access is a duplicate of the preceding.
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*
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* Input Parameters:
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* value - The value to be written
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* address - The address of the register to write to
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*
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* Returned Value:
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* true: This is the first register access of this type.
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* false: This is the same as the preceding register access.
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*
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****************************************************************************/
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#ifdef CONFIG_SAM34_TWI_REGDEBUG
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static bool twi_checkreg(struct twi_dev_s *priv, bool wr, uint32_t value,
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uint32_t address)
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{
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if (wr == priv->wrlast && /* Same kind of access? */
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value == priv->vallast && /* Same value? */
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address == priv->addrlast) /* Same address? */
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{
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/* Yes, then just keep a count of the number of times we did this. */
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priv->ntimes++;
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return false;
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}
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else
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{
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/* Did we do the previous operation more than once? */
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if (priv->ntimes > 0)
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{
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/* Yes... show how many times we did it */
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lldbg("...[Repeats %d times]...\n", priv->ntimes);
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}
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/* Save information about the new access */
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priv->wrlast = wr;
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priv->vallast = value;
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priv->addrlast = address;
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priv->ntimes = 0;
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}
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/* Return true if this is the first time that we have done this operation */
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return true;
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}
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#endif
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/****************************************************************************
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* Name: twi_getabs
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*
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* Description:
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* Read any 32-bit register using an absolute
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*
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****************************************************************************/
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#ifdef CONFIG_SAM34_TWI_REGDEBUG
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static uint32_t twi_getabs(struct twi_dev_s *priv, uintptr_t address)
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{
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uint32_t value = getreg32(address);
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if (twi_checkreg(priv, false, value, address))
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{
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lldbg("%08x->%08x\n", address, value);
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}
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return value;
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}
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#endif
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/****************************************************************************
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* Name: twi_putabs
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*
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* Description:
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* Write to any 32-bit register using an absolute address
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*
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****************************************************************************/
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#ifdef CONFIG_SAM34_TWI_REGDEBUG
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static void twi_putabs(struct twi_dev_s *priv, uintptr_t address,
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uint32_t value)
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{
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if (twi_checkreg(priv, true, value, address))
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{
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lldbg("%08x<-%08x\n", address, value);
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}
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putreg32(value, address);
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}
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#endif
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/****************************************************************************
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* Name: twi_getrel
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*
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* Description:
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* Read a TWI register using an offset relative to the TWI base address
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*
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****************************************************************************/
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static inline uint32_t twi_getrel(struct twi_dev_s *priv, unsigned int offset)
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{
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return twi_getabs(priv, priv->base + offset);
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}
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/****************************************************************************
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* Name: twi_putrel
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*
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* Description:
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* Write a value to a TWI register using an offset relative to the TWI base
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* address.
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*
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****************************************************************************/
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static inline void twi_putrel(struct twi_dev_s *priv, unsigned int offset,
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uint32_t value)
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{
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twi_putabs(priv, priv->base + offset, value);
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}
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/****************************************************************************
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* I2C transfer helper functions
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****************************************************************************/
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/****************************************************************************
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* Name: twi_wait
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*
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* Description:
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* Perform a I2C transfer start
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*
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* Assumptions:
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* Interrupts are disabled
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*
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****************************************************************************/
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static int twi_wait(struct twi_dev_s *priv)
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{
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/* Start a timeout to avoid hangs */
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wd_start(priv->timeout, TWI_TIMEOUT, twi_timeout, 1, (uint32_t)priv);
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/* Wait for either the TWI transfer or the timeout to complete */
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do
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{
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i2clldbg("TWI%d Waiting...\n", priv->twi);
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twi_takesem(&priv->waitsem);
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i2clldbg("TWI%d Awakened with result: %d\n", priv->twi, priv->result);
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}
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while (priv->result == -EBUSY);
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/* We get here via twi_wakeup. The watchdog timer has been disabled and
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* all further interrupts for the TWI have been disabled.
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*/
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return priv->result;
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}
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/****************************************************************************
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* Name: twi_wakeup
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*
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* Description:
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* A terminal event has occurred. Wake-up the waiting thread
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*
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****************************************************************************/
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static void twi_wakeup(struct twi_dev_s *priv, int result)
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{
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/* Cancel any pending timeout */
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wd_cancel(priv->timeout);
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/* Disable any further TWI interrupts */
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twi_putrel(priv, SAM_TWI_IDR_OFFSET, TWI_INT_ALL);
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/* Wake up the waiting thread with the result of the transfer */
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priv->result = result;
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twi_givesem(&priv->waitsem);
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}
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|
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/****************************************************************************
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* Name: twi_interrupt
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*
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* Description:
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* The TWI Interrupt Handler
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*
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****************************************************************************/
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static int twi_interrupt(struct twi_dev_s *priv)
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{
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struct i2c_msg_s *msg;
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uint32_t sr;
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uint32_t imr;
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uint32_t pending;
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uint32_t regval;
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/* Retrieve masked interrupt status */
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sr = twi_getrel(priv, SAM_TWI_SR_OFFSET);
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imr = twi_getrel(priv, SAM_TWI_IMR_OFFSET);
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pending = sr & imr;
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i2cllvdbg("TWI%d pending: %08x\n", priv->twi, pending);
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msg = priv->msg;
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/* Check for errors */
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if ((pending & TWI_INT_ERRORS) != 0)
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{
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/* Wake up the thread with an I/O error indication */
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i2clldbg("ERROR: TWI%d pending: %08x\n", priv->twi, pending);
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twi_wakeup(priv, -EIO);
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}
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|
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/* Byte received */
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|
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else if ((pending & TWI_INT_RXRDY) != 0)
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{
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msg->buffer[priv->xfrd] = twi_getrel(priv, SAM_TWI_RHR_OFFSET);
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priv->xfrd++;
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|
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/* Check for transfer complete */
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|
|
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if (priv->xfrd >= msg->length)
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{
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/* The transfer is complete. Disable the RXRDY interrupt and
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* enable the TXCOMP interrupt
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*/
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twi_putrel(priv, SAM_TWI_IDR_OFFSET, TWI_INT_RXRDY);
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twi_putrel(priv, SAM_TWI_IER_OFFSET, TWI_INT_TXCOMP);
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}
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|
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/* Not yet complete, but will the next be the last byte? */
|
|
|
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else if (priv->xfrd == (msg->length - 1))
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{
|
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/* Yes, set the stop signal */
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|
|
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twi_putrel(priv, SAM_TWI_CR_OFFSET, TWI_CR_STOP);
|
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}
|
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}
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|
|
|
/* Byte sent */
|
|
|
|
else if ((pending & TWI_INT_TXRDY) != 0)
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{
|
|
/* Transfer finished? */
|
|
|
|
if (priv->xfrd >= msg->length)
|
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{
|
|
/* The transfer is complete. Disable the TXRDY interrupt and
|
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* enable the TXCOMP interrupt
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*/
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twi_putrel(priv, SAM_TWI_IDR_OFFSET, TWI_INT_TXRDY);
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twi_putrel(priv, SAM_TWI_IER_OFFSET, TWI_INT_TXCOMP);
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|
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/* Send the STOP condition */
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|
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regval = twi_getrel(priv, SAM_TWI_CR_OFFSET);
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regval |= TWI_CR_STOP;
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twi_putrel(priv, SAM_TWI_CR_OFFSET, regval);
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}
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|
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/* No, there are more bytes remaining to be sent */
|
|
|
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else
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{
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twi_putrel(priv, SAM_TWI_THR_OFFSET, msg->buffer[priv->xfrd]);
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priv->xfrd++;
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}
|
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}
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|
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/* Transfer complete */
|
|
|
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else if ((pending & TWI_INT_TXCOMP) != 0)
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{
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twi_putrel(priv, SAM_TWI_IDR_OFFSET, TWI_INT_TXCOMP);
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|
|
/* Is there another message to send? */
|
|
|
|
if (priv->msgc > 1)
|
|
{
|
|
/* Yes... start the next message */
|
|
|
|
priv->msg++;
|
|
priv->msgc--;
|
|
twi_startmessage(priv, priv->msg);
|
|
}
|
|
else
|
|
{
|
|
/* No.. we made it to the end of the message list with no errors.
|
|
* Cancel any timeout and wake up the waiting thread with a
|
|
* success indication.
|
|
*/
|
|
|
|
twi_wakeup(priv, OK);
|
|
}
|
|
}
|
|
|
|
return OK;
|
|
}
|
|
|
|
#ifdef CONFIG_SAM34_TWI0
|
|
static int twi0_interrupt(int irq, FAR void *context)
|
|
{
|
|
return twi_interrupt(&g_twi0);
|
|
}
|
|
#endif
|
|
|
|
#ifdef CONFIG_SAM34_TWI1
|
|
static int twi1_interrupt(int irq, FAR void *context)
|
|
{
|
|
return twi_interrupt(&g_twi1);
|
|
}
|
|
#endif
|
|
|
|
/****************************************************************************
|
|
* Name: twi_timeout
|
|
*
|
|
* Description:
|
|
* Watchdog timer for timeout of TWI operation
|
|
*
|
|
* Assumptions:
|
|
* Called from the timer interrupt handler with interrupts disabled.
|
|
*
|
|
****************************************************************************/
|
|
|
|
static void twi_timeout(int argc, uint32_t arg, ...)
|
|
{
|
|
struct twi_dev_s *priv = (struct twi_dev_s *)arg;
|
|
|
|
i2clldbg("TWI%d Timeout!\n", priv->twi);
|
|
twi_wakeup(priv, -ETIMEDOUT);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: twi_startread
|
|
*
|
|
* Description:
|
|
* Start the next read message
|
|
*
|
|
****************************************************************************/
|
|
|
|
static void twi_startread(struct twi_dev_s *priv, struct i2c_msg_s *msg)
|
|
{
|
|
/* Setup for the transfer */
|
|
|
|
priv->result = -EBUSY;
|
|
priv->xfrd = 0;
|
|
|
|
/* Set STOP signal if only one byte is sent */
|
|
|
|
if (msg->length == 1)
|
|
{
|
|
twi_putrel(priv, SAM_TWI_CR_OFFSET, TWI_CR_STOP);
|
|
}
|
|
|
|
/* Set slave address and number of internal address bytes. */
|
|
|
|
twi_putrel(priv, SAM_TWI_MMR_OFFSET, 0);
|
|
twi_putrel(priv, SAM_TWI_MMR_OFFSET, TWI_MMR_IADRSZ_NONE | TWI_MMR_MREAD | TWI_MMR_DADR(msg->addr));
|
|
|
|
/* Set internal address bytes (not used) */
|
|
|
|
twi_putrel(priv, SAM_TWI_IADR_OFFSET, 0);
|
|
|
|
/* Enable read interrupt and send the START condition */
|
|
|
|
twi_putrel(priv, SAM_TWI_IER_OFFSET, TWI_INT_RXRDY | TWI_INT_ERRORS);
|
|
twi_putrel(priv, SAM_TWI_CR_OFFSET, TWI_CR_START);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: twi_startwrite
|
|
*
|
|
* Description:
|
|
* Start the next write message
|
|
*
|
|
****************************************************************************/
|
|
|
|
static void twi_startwrite(struct twi_dev_s *priv, struct i2c_msg_s *msg)
|
|
{
|
|
/* Setup for the transfer */
|
|
|
|
priv->result = -EBUSY;
|
|
priv->xfrd = 0;
|
|
|
|
/* Set slave address and number of internal address bytes. */
|
|
|
|
twi_putrel(priv, SAM_TWI_MMR_OFFSET, 0);
|
|
twi_putrel(priv, SAM_TWI_MMR_OFFSET, TWI_MMR_IADRSZ_NONE | TWI_MMR_DADR(msg->addr));
|
|
|
|
/* Set internal address bytes (not used) */
|
|
|
|
twi_putrel(priv, SAM_TWI_IADR_OFFSET, 0);
|
|
|
|
/* Write first byte to send. */
|
|
|
|
twi_putrel(priv, SAM_TWI_THR_OFFSET, msg->buffer[priv->xfrd++]);
|
|
|
|
/* Enable write interrupt */
|
|
|
|
twi_putrel(priv, SAM_TWI_IER_OFFSET, TWI_INT_TXRDY | TWI_INT_ERRORS);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: twi_startmessage
|
|
*
|
|
* Description:
|
|
* Start the next write message
|
|
*
|
|
****************************************************************************/
|
|
|
|
static void twi_startmessage(struct twi_dev_s *priv, struct i2c_msg_s *msg)
|
|
{
|
|
if ((msg->flags & I2C_M_READ) == 0)
|
|
{
|
|
twi_startread(priv, msg);
|
|
}
|
|
else
|
|
{
|
|
twi_startwrite(priv, msg);
|
|
}
|
|
}
|
|
|
|
/****************************************************************************
|
|
* I2C device operations
|
|
****************************************************************************/
|
|
|
|
/****************************************************************************
|
|
* Name: twi_transfer
|
|
*
|
|
* Description:
|
|
* Receive a block of data on I2C using the previously selected I2C
|
|
* frequency and slave address.
|
|
*
|
|
****************************************************************************/
|
|
|
|
static int twi_transfer(FAR struct i2c_master_s *dev,
|
|
FAR struct i2c_msg_s *msgs, int count)
|
|
{
|
|
struct twi_dev_s *priv = (struct twi_dev_s *)dev;
|
|
irqstate_t flags;
|
|
int ret;
|
|
|
|
DEBUGASSERT(dev != NULL);
|
|
i2cvdbg("TWI%d count: %d\n", priv->twi, count);
|
|
|
|
/* Get exclusive access to the device */
|
|
|
|
twi_takesem(&priv->exclsem);
|
|
|
|
/* Setup the message transfer */
|
|
|
|
priv->msg = msgs;
|
|
priv->msgc = count;
|
|
|
|
/* Configure the I2C frequency.
|
|
* REVISIT: Note that the frequency is set only on the first message.
|
|
* This could be extended to support different transfer frequencies for
|
|
* each message segment.
|
|
*/
|
|
|
|
twi_setfrequency(priv, msgs->frequency);
|
|
|
|
/* Initiate the transfer. The rest will be handled from interrupt
|
|
* logic. Interrupts must be disabled to prevent re-entrance from the
|
|
* interrupt level.
|
|
*/
|
|
|
|
flags = enter_critical_section();
|
|
twi_startmessage(priv, msgs);
|
|
|
|
/* And wait for the transfers to complete. Interrupts will be re-enabled
|
|
* while we are waiting.
|
|
*/
|
|
|
|
ret = twi_wait(priv);
|
|
if (ret < 0)
|
|
{
|
|
i2cdbg("ERROR: Transfer failed: %d\n", ret);
|
|
}
|
|
|
|
leave_critical_section(flags);
|
|
twi_givesem(&priv->exclsem);
|
|
return ret;
|
|
}
|
|
|
|
/************************************************************************************
|
|
* Name: twi_reset
|
|
*
|
|
* Description:
|
|
* Perform an I2C bus reset in an attempt to break loose stuck I2C devices.
|
|
*
|
|
* Input Parameters:
|
|
* dev - Device-specific state data
|
|
*
|
|
* Returned Value:
|
|
* Zero (OK) on success; a negated errno value on failure.
|
|
*
|
|
************************************************************************************/
|
|
|
|
#ifdef CONFIG_I2C_RESET
|
|
static int twi_reset(FAR struct i2c_master_s * dev)
|
|
{
|
|
return OK;
|
|
}
|
|
#endif /* CONFIG_I2C_RESET */
|
|
|
|
/****************************************************************************
|
|
* Initialization
|
|
****************************************************************************/
|
|
|
|
/****************************************************************************
|
|
* Name: twi_setfrequency
|
|
*
|
|
* Description:
|
|
* Set the frequency for the next transfer
|
|
*
|
|
****************************************************************************/
|
|
|
|
static void twi_setfrequency(struct twi_dev_s *priv, uint32_t frequency)
|
|
{
|
|
unsigned int ckdiv;
|
|
unsigned int cldiv;
|
|
uint32_t regval;
|
|
|
|
if (frequency != priv->i2cfreq)
|
|
{
|
|
/* Configure TWI output clocking, trying each value of CKDIV {0..7} */
|
|
|
|
for (ckdiv = 0; ckdiv < 8; ckdiv++)
|
|
{
|
|
/* Calulate the CLDIV value using the current CKDIV guess */
|
|
|
|
cldiv = ((priv->clkin / (frequency << 1)) - 4) / (1 << ckdiv);
|
|
|
|
/* Is CLDIV in range? */
|
|
|
|
if (cldiv <= 255)
|
|
{
|
|
/* Yes, break out and use it */
|
|
|
|
break;
|
|
}
|
|
}
|
|
|
|
/* Then setup the TWI Clock Waveform Generator Register, using the same
|
|
* value for CLDIV and CHDIV (for 1:1 duty).
|
|
*/
|
|
|
|
twi_putrel(priv, SAM_TWI_CWGR_OFFSET, 0);
|
|
|
|
regval = ((uint32_t)ckdiv << TWI_CWGR_CKDIV_SHIFT) |
|
|
((uint32_t)cldiv << TWI_CWGR_CHDIV_SHIFT) |
|
|
((uint32_t)cldiv << TWI_CWGR_CLDIV_SHIFT);
|
|
twi_putrel(priv, SAM_TWI_CWGR_OFFSET, regval);
|
|
|
|
/* Remember the selected frequency for error recovery */
|
|
|
|
priv->i2cfreq = frequency;
|
|
}
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: twi_hw_initialize
|
|
*
|
|
* Description:
|
|
* Initialize one TWI peripheral for I2C operation
|
|
*
|
|
****************************************************************************/
|
|
|
|
static void twi_hw_initialize(struct twi_dev_s *priv, unsigned int pid,
|
|
uint32_t frequency)
|
|
{
|
|
#if 0
|
|
uint32_t regval;
|
|
uint32_t mck;
|
|
#endif
|
|
|
|
i2cvdbg("TWI%d Initializing\n", priv->twi);
|
|
|
|
/* SVEN: TWI Slave Mode Enabled */
|
|
|
|
twi_putrel(priv, SAM_TWI_CR_OFFSET, TWI_CR_SVEN);
|
|
|
|
/* Reset the TWI */
|
|
|
|
twi_putrel(priv, SAM_TWI_CR_OFFSET, TWI_CR_SWRST);
|
|
(void)twi_getrel(priv, SAM_TWI_RHR_OFFSET);
|
|
|
|
/* TWI Slave Mode Disabled, TWI Master Mode Disabled. */
|
|
|
|
twi_putrel(priv, SAM_TWI_CR_OFFSET, TWI_CR_SVDIS);
|
|
twi_putrel(priv, SAM_TWI_CR_OFFSET, TWI_CR_MSDIS);
|
|
|
|
/* Set master mode */
|
|
|
|
twi_putrel(priv, SAM_TWI_CR_OFFSET, TWI_CR_MSEN);
|
|
|
|
/* Set base frequency */
|
|
|
|
priv->clkin = BOARD_MCK_FREQUENCY;
|
|
|
|
#if 0
|
|
/* Determine the maximum valid frequency setting */
|
|
|
|
mck = BOARD_MCK_FREQUENCY;
|
|
DEBUGASSERT((mck >> 3) <= TWI_MAX_FREQUENCY);
|
|
|
|
if (mck <= TWI_MAX_FREQUENCY)
|
|
{
|
|
priv->clkin = mck;
|
|
regval = PMC_PCR_DIV1;
|
|
}
|
|
else if ((mck >> 1) <= TWI_MAX_FREQUENCY)
|
|
{
|
|
priv->clkin = (mck >> 1);
|
|
regval = PMC_PCR_DIV2;
|
|
}
|
|
else if ((mck >> 2) <= TWI_MAX_FREQUENCY)
|
|
{
|
|
priv->clkin = (mck >> 2);
|
|
regval = PMC_PCR_DIV4;
|
|
}
|
|
else /* if ((mck >> 3) <= TWI_MAX_FREQUENCY) */
|
|
{
|
|
priv->clkin = (mck >> 3);
|
|
regval = PMC_PCR_DIV8;
|
|
}
|
|
|
|
/* Set the TWI peripheral input clock to the maximum, valid frequency */
|
|
|
|
regval |= PMC_PCR_PID(pid) | PMC_PCR_CMD | PMC_PCR_EN;
|
|
twi_putabs(priv, SAM_PMC_PCR, regval);
|
|
#endif
|
|
|
|
/* Set the initial TWI data transfer frequency */
|
|
|
|
priv->i2cfreq = 0;
|
|
twi_setfrequency(priv, frequency);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Public Functions
|
|
****************************************************************************/
|
|
|
|
/****************************************************************************
|
|
* Name: sam_i2cbus_initialize
|
|
*
|
|
* Description:
|
|
* Initialize a TWI device for I2C operation
|
|
*
|
|
****************************************************************************/
|
|
|
|
struct i2c_master_s *sam_i2cbus_initialize(int bus)
|
|
{
|
|
struct twi_dev_s *priv;
|
|
xcpt_t handler;
|
|
irqstate_t flags;
|
|
uint32_t frequency;
|
|
unsigned int pid;
|
|
|
|
i2cvdbg("Initializing TWI%d\n", bus);
|
|
|
|
flags = enter_critical_section();
|
|
|
|
#ifdef CONFIG_SAM34_TWI0
|
|
if (bus == 0)
|
|
{
|
|
/* Set up TWI0 register base address and IRQ number */
|
|
|
|
priv = &g_twi0;
|
|
priv->base = SAM_TWI0_BASE;
|
|
priv->irq = SAM_IRQ_TWI0;
|
|
priv->twi = 0;
|
|
|
|
/* Enable peripheral clocking */
|
|
|
|
sam_twi0_enableclk();
|
|
|
|
/* Configure PIO pins */
|
|
|
|
sam_configgpio(GPIO_TWI0_CK);
|
|
sam_configgpio(GPIO_TWI0_D);
|
|
|
|
/* Select the interrupt handler, TWI frequency, and peripheral ID */
|
|
|
|
handler = twi0_interrupt;
|
|
frequency = CONFIG_SAM34_TWI0_FREQUENCY;
|
|
pid = SAM_PID_TWI0;
|
|
}
|
|
else
|
|
#endif
|
|
#ifdef CONFIG_SAM34_TWI1
|
|
if (bus == 1)
|
|
{
|
|
/* Set up TWI1 register base address and IRQ number */
|
|
|
|
priv = &g_twi1;
|
|
priv->base = SAM_TWI0_BASE;
|
|
priv->irq = SAM_IRQ_TWI1;
|
|
priv->twi = 1;
|
|
|
|
/* Enable peripheral clocking */
|
|
|
|
sam_twi1_enableclk();
|
|
|
|
/* Configure PIO pins */
|
|
|
|
sam_configgpio(GPIO_TWI1_CK);
|
|
sam_configgpio(GPIO_TWI1_D);
|
|
|
|
/* Select the interrupt handler, TWI frequency, and peripheral ID */
|
|
|
|
handler = twi1_interrupt;
|
|
frequency = CONFIG_SAMA5_TWI1_FREQUENCY;
|
|
pid = SAM_PID_TWI1;
|
|
}
|
|
else
|
|
#endif
|
|
{
|
|
leave_critical_section(flags);
|
|
i2cdbg("ERROR: Unsupported bus: TWI%d\n", bus);
|
|
return NULL;
|
|
}
|
|
|
|
/* Initialize the device structure */
|
|
|
|
priv->dev.ops = &g_twiops;
|
|
|
|
sem_init(&priv->exclsem, 0, 1);
|
|
sem_init(&priv->waitsem, 0, 0);
|
|
|
|
/* Allocate a watchdog timer */
|
|
|
|
priv->timeout = wd_create();
|
|
DEBUGASSERT(priv->timeout != 0);
|
|
|
|
/* Configure and enable the TWI hardware */
|
|
|
|
priv->pid = pid;
|
|
twi_hw_initialize(priv, pid, frequency);
|
|
|
|
/* Attach Interrupt Handler */
|
|
|
|
irq_attach(priv->irq, handler);
|
|
|
|
/* Enable Interrupts */
|
|
|
|
up_enable_irq(priv->irq);
|
|
leave_critical_section(flags);
|
|
return &priv->dev;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: sam_i2cbus_uninitialize
|
|
*
|
|
* Description:
|
|
* Uninitialise an I2C device
|
|
*
|
|
****************************************************************************/
|
|
|
|
int sam_i2cbus_uninitialize(FAR struct i2c_master_s * dev)
|
|
{
|
|
struct twi_dev_s *priv = (struct twi_dev_s *) dev;
|
|
|
|
i2cvdbg("TWI%d Un-initializing\n", priv->twi);
|
|
|
|
/* Disable interrupts */
|
|
|
|
up_disable_irq(priv->irq);
|
|
|
|
/* Reset data structures */
|
|
|
|
sem_destroy(&priv->exclsem);
|
|
sem_destroy(&priv->waitsem);
|
|
|
|
/* Free the watchdog timer */
|
|
|
|
wd_delete(priv->timeout);
|
|
priv->timeout = NULL;
|
|
|
|
/* Detach Interrupt Handler */
|
|
|
|
irq_detach(priv->irq);
|
|
return OK;
|
|
}
|
|
|
|
#endif /* CONFIG_SAM34_TWI0 || CONFIG_SAM34_TWI1 */
|