nuttx/arch/xtensa/src
Tiago Medicci Serrano 78fbc2fc64 esp32/spiflash: Fix error to pause the other CPU during operation
Whenever a SPI flash operation will take place, it's necessary to
disable the cache and run no code from the flash. This includes
pausing the other CPU (when `CONFIG_SMP=y`). This commit prevents
an error to occur when the CPU core is evaluated before the task
is increased to the max priority.
2024-03-29 16:14:27 +08:00
..
common
esp32 esp32/spiflash: Fix error to pause the other CPU during operation 2024-03-29 16:14:27 +08:00
esp32s2
esp32s3
lx6
lx7
.gitignore
Makefile