8525c266a1
The motvations is to version the IP blocks of the Kinetis
K series family of parts.
This added versioning and configuration features for the
Kinetis PMC IP block.
It is envisioned that in the long term as a chip is added.
The author of the new chip definitions will either find
the exact configuration in an existing chip define and
add the new chip to it Or add the PMC fature configuration
#defines to the chip ifdef list in
arch/arm/include/kinetis/kinetis_pmc.h In either case the
author should mark it as "Verified to Document Number:"
taken from the reference manual.
The version KINETIS_PMC_VERSION_UKN has been applied to
most all the SoCs in the kinetis arch prior to this commit.
The exceptions are the CONFIG_ARCH_CHIP_MK60FN1M0VLQ12,
CONFIG_ARCH_CHIP_MK20DXxxxVLH7 All K64 and K66 have ben
Verified PMC configurations.
325 lines
14 KiB
C
325 lines
14 KiB
C
/************************************************************************************
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* arch/arm/include/kinetis/kinetis_pmc.h
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*
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* Copyright (C) 2017 Gregory Nutt. All rights reserved.
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* Authors: Gregory Nutt <gnutt@nuttx.org>
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* David Sidrane <david_s5@nscdg.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_PMC_H
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#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_PMC_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Note: It is envisioned that in the long term as a chip is added. The author of
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* the new chip definitions will either find the exact configuration in an existing
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* chip define and add the new chip to it Or add the PMC feature configuration
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* #defines to the chip ifdef list below. In either case the author should mark
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* it as "Verified to Document Number:" taken from the reference manual.
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*
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* To maintain backward compatibility to the version of NuttX prior to
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* 2/22/2017, the catch all KINETIS_PMC_VERSION_UKN configuration is assigned
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* to all the chips that did not have any conditional compilation based on
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* KINETIS_K64 or KINETIS_K66. This is a "No worse" than the original code solution.
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* N.B. Each original chip "if"definitions have been left intact so that the
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* complete legacy definitions prior to 2/22/2017 may be filled in completely when
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* vetted.
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*/
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/* PMC Register Configuration
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*
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* KINETIS_PMC_HAS_REGSC - SoC has REGSC Register
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* KINETIS_PMC_HAS_REGSC_ACKISO - SoC has REGSC[ACKISO]
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* KINETIS_PMC_HAS_REGSC_VLPRS - SoC has REGSC[VLPRS]
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* KINETIS_PMC_HAS_REGSC_VLPO - SoC has REGSC[VLPO]
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* KINETIS_PMC_HAS_REGSC_REGFPM - SoC has REGSC[REGFPM]
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* KINETIS_PMC_HAS_REGSC_BGEN - SoC has REGSC[BGEN]
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* KINETIS_PMC_HAS_REGSC_TRAMPO - SoC has REGSC[TRAMPO]
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* KINETIS_PMC_HAS_REGSC_REGONS - SoC has REGSC[REGONS]
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*/
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/* Describe the version of the PMC
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*
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* These defines are not related to any NXP reference but are merely
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* a way to label the versions we are using
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*/
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#define KINETIS_PMC_VERSION_UKN -1 /* What was in nuttx prior to 2/22/2017 */
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#define KINETIS_PMC_VERSION_01 1 /* Verified Document Number: K60P144M150SF3RM Rev. 3, November 2014 */
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#define KINETIS_PMC_VERSION_04 4 /* Verified to Document Numbers:
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* K20P64M72SF1RM Rev. 1.1, Dec 2012
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* K64P144M120SF5RM Rev. 2, January 2014
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* K66P144M180SF5RMV2 Rev. 2, May 2015 */
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/* MK20DX/DN---VLH5
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*
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* ------------- ------ --- ------- ------ ------- ------ ----- ----
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* PART NUMBER CPU PIN PACKAGE TOTAL PROGRAM EEPROM SRAM GPIO
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* FREQ CNT FLASH FLASH
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* ------------- ------ --- ------- ------ ------- ------ ----- ----
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* MK20DN32VLH5 50 MHz 64 LQFP 32 KB 32 KB — 8 KB 40
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* MK20DX32VLH5 50 MHz 64 LQFP 64 KB 32 KB 2 KB 8 KB 40
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* MK20DN64VLH5 50 MHz 64 LQFP 64 KB 64 KB — 16 KB 40
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* MK20DX64VLH5 50 MHz 64 LQFP 96 KB 64 KB 2 KB 16 KB 40
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* MK20DN128VLH5 50 MHz 64 LQFP 128 KB 128 KB — 16 KB 40
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* MK20DX128VLH5 50 MHz 64 LQFP 160 KB 128 KB 2 KB 16 KB 40
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*/
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#if defined(CONFIG_ARCH_CHIP_MK20DN32VLH5) || \
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defined(CONFIG_ARCH_CHIP_MK20DX32VLH5) || \
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defined(CONFIG_ARCH_CHIP_MK20DN64VLH5) || \
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defined(CONFIG_ARCH_CHIP_MK20DX64VLH5) || \
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defined(CONFIG_ARCH_CHIP_MK20DN128VLH5) || \
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defined(CONFIG_ARCH_CHIP_MK20DX128VLH5)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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/* MK20DX---VLH7
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*
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* ------------- ------ --- ------- ------ ------- ------ ----- ----
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* PART NUMBER CPU PIN PACKAGE TOTAL PROGRAM EEPROM SRAM GPIO
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* FREQ CNT FLASH FLASH
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* ------------- ------ --- ------- ------ ------- ------ ----- ----
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* MK20DX64VLH7 72 MHz 64 LQFP 96 KB 64 KB 2 KB 16 KB 40
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* MK20DX128VLH7 72 MHz 64 LQFP 160 KB 128 KB 2 KB 32 KB 40
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* MK20DX256VLH7 72 MHz 64 LQFP 288 KB 256 KB 2 KB 64 KB 40
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* ------------- ------ --- ------- ------ ------- ------ ----- ----
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*/
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#elif defined(CONFIG_ARCH_CHIP_MK20DX64VLH7) || defined(CONFIG_ARCH_CHIP_MK20DX128VLH7) || \
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defined(CONFIG_ARCH_CHIP_MK20DX256VLH7)
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/* Verified to Document Number: K20P64M72SF1RM Rev. 1.1, Dec 2012 */
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_04
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/* PMC Register Configuration */
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# define KINETIS_PMC_HAS_REGSC 1 /* SoC has REGSC Register */
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# define KINETIS_PMC_HAS_REGSC_ACKISO 1 /* SoC has REGSC[ACKISO] */
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# undef KINETIS_PMC_HAS_REGSC_VLPRS /* SoC has REGSC[VLPRS] */
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# undef KINETIS_PMC_HAS_REGSC_VLPO /* SoC has REGSC[VLPO] */
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# undef KINETIS_PMC_HAS_REGSC_REGFPM /* SoC has REGSC[REGFPM] */
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# define KINETIS_PMC_HAS_REGSC_BGEN 1 /* SoC has REGSC[BGEN] */
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# undef KINETIS_PMC_HAS_REGSC_TRAMPO /* SoC has REGSC[TRAMPO] */
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# define KINETIS_PMC_HAS_REGSC_REGONS 1 /* SoC has REGSC[REGONS] */
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#elif defined(CONFIG_ARCH_CHIP_MK40X64VFX50) || defined(CONFIG_ARCH_CHIP_MK40X64VLH50) || \
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defined(CONFIG_ARCH_CHIP_MK40X64VLK50) || defined(CONFIG_ARCH_CHIP_MK40X64VMB50)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK40X128VFX50) || defined(CONFIG_ARCH_CHIP_MK40X128VLH50) || \
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defined(CONFIG_ARCH_CHIP_MK40X128VLK50) || defined(CONFIG_ARCH_CHIP_MK40X128VMB50) || \
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defined(CONFIG_ARCH_CHIP_MK40X128VLL50) || defined(CONFIG_ARCH_CHIP_MK40X128VML50) || \
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defined(CONFIG_ARCH_CHIP_MK40X128VFX72) || defined(CONFIG_ARCH_CHIP_MK40X128VLH72) || \
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defined(CONFIG_ARCH_CHIP_MK40X128VLK72) || defined(CONFIG_ARCH_CHIP_MK40X128VMB72) || \
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defined(CONFIG_ARCH_CHIP_MK40X128VLL72) || defined(CONFIG_ARCH_CHIP_MK40X128VML72)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK40X256VLK72) || defined(CONFIG_ARCH_CHIP_MK40X256VMB72) || \
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defined(CONFIG_ARCH_CHIP_MK40X256VLL72) || defined(CONFIG_ARCH_CHIP_MK40X256VML72)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK40X128VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X128VMD100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK40X256VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X256VMD100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK40N512VLK100) || defined(CONFIG_ARCH_CHIP_MK40N512VMB100) || \
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defined(CONFIG_ARCH_CHIP_MK40N512VLL100) || defined(CONFIG_ARCH_CHIP_MK40N512VML100) || \
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defined(CONFIG_ARCH_CHIP_MK40N512VLQ100) || defined(CONFIG_ARCH_CHIP_MK40N512VMD100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60N256VLL100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60X256VLL100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60N512VLL100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60N256VML100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60X256VML100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60N512VML100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60N256VLQ100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60X256VLQ100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60N512VLQ100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60N256VMD100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60X256VMD100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60N512VMD100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60FN1M0VLQ12)
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/* Verified to Document Number: K60P144M100SF2V2RM Rev. 2 Jun 2012 */
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_01
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/* PMC Register Configuration */
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# define KINETIS_PMC_HAS_REGSC 1 /* SoC has REGSC Register */
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# define KINETIS_PMC_HAS_REGSC_ACKISO 1 /* SoC has REGSC[ACKISO] */
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# undef KINETIS_PMC_HAS_REGSC_VLPRS /* SoC has REGSC[VLPRS] */
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# undef KINETIS_PMC_HAS_REGSC_VLPO /* SoC has REGSC[VLPO] */
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# undef KINETIS_PMC_HAS_REGSC_REGFPM /* SoC has REGSC[REGFPM] */
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# undef KINETIS_PMC_HAS_REGSC_BGEN /* SoC has REGSC[BGEN] */
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# undef KINETIS_PMC_HAS_REGSC_TRAMPO /* SoC has REGSC[TRAMPO] */
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# define KINETIS_PMC_HAS_REGSC_REGONS 1 /* SoC has REGSC[REGONS] */
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#elif defined(CONFIG_ARCH_CHIP_MK64FN1M0VLL12) || defined(CONFIG_ARCH_CHIP_MK64FX512VLL12) || \
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defined(CONFIG_ARCH_CHIP_MK64FX512VDC12) || defined(CONFIG_ARCH_CHIP_MK64FN1M0VDC12) || \
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defined(CONFIG_ARCH_CHIP_MK64FX512VLQ12) || defined(CONFIG_ARCH_CHIP_MK64FN1M0VLQ12) || \
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defined(CONFIG_ARCH_CHIP_MK64FX512VMD12) || defined(CONFIG_ARCH_CHIP_MK64FN1M0VMD12)
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/* Verified to Document Number: K64P144M120SF5RM Rev. 2, January 2014 */
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_04
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/* PMC Register Configuration */
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# define KINETIS_PMC_HAS_REGSC 1 /* SoC has REGSC Register */
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# define KINETIS_PMC_HAS_REGSC_ACKISO 1 /* SoC has REGSC[ACKISO] */
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# undef KINETIS_PMC_HAS_REGSC_VLPRS /* SoC has REGSC[VLPRS] */
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# undef KINETIS_PMC_HAS_REGSC_VLPO /* SoC has REGSC[VLPO] */
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# undef KINETIS_PMC_HAS_REGSC_REGFPM /* SoC has REGSC[REGFPM] */
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# define KINETIS_PMC_HAS_REGSC_BGEN 1 /* SoC has REGSC[BGEN] */
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# undef KINETIS_PMC_HAS_REGSC_TRAMPO /* SoC has REGSC[TRAMPO] */
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# define KINETIS_PMC_HAS_REGSC_REGONS 1 /* SoC has REGSC[REGONS] */
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/* MK66F N/X 1M0/2M0 V MD/LQ 18
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*
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* --------------- ------- --- ------- ------- ------ ------ ------ -----
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* PART NUMBER CPU PIN PACKAGE TOTAL PROGRAM EEPROM SRAM GPIO
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* FREQ CNT FLASH FLASH
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* --------------- ------- --- ------- ------- ------ ------ ------ -----
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* MK66FN2M0VMD18 180 MHz 144 MAPBGA 2 MB — — KB 260 KB 100
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* MK66FX1M0VMD18 180 MHz 144 MAPBGA 1.25 MB 1 MB 4 KB 256 KB 100
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* MK66FN2M0VLQ18 180 MHz 144 LQFP 2 MB — — KB 260 KB 100
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* MK66FX1M0VLQ18 180 MHz 144 LQFP 1.25 MB 1 MB 4 KB 256 KB 100
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*/
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#elif defined(CONFIG_ARCH_CHIP_MK66FN2M0VMD18) || defined(CONFIG_ARCH_CHIP_MK66FX1M0VMD18) || \
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defined(CONFIG_ARCH_CHIP_MK66FN2M0VLQ18) || defined(CONFIG_ARCH_CHIP_MK66FX1M0VLQ18)
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/* Verified to Document Number: Document Number: K66P144M180SF5RMV2 Rev. 2, May 2015 */
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_04
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/* PMC Register Configuration */
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# define KINETIS_PMC_HAS_REGSC 1 /* SoC has REGSC Register */
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# define KINETIS_PMC_HAS_REGSC_ACKISO 1 /* SoC has REGSC[ACKISO] */
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# undef KINETIS_PMC_HAS_REGSC_VLPRS /* SoC has REGSC[VLPRS] */
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# undef KINETIS_PMC_HAS_REGSC_VLPO /* SoC has REGSC[VLPO] */
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# undef KINETIS_PMC_HAS_REGSC_REGFPM /* SoC has REGSC[REGFPM] */
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# define KINETIS_PMC_HAS_REGSC_BGEN 1 /* SoC has REGSC[BGEN] */
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# undef KINETIS_PMC_HAS_REGSC_TRAMPO /* SoC has REGSC[TRAMPO] */
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# define KINETIS_PMC_HAS_REGSC_REGONS 1 /* SoC has REGSC[REGONS] */
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#else
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# error "Unsupported Kinetis chip"
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#endif
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/* Use the catch all configuration for the PMC based on the implementations in nuttx prior 2/3/2017 */
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#if KINETIS_PMC_VERSION == KINETIS_PMC_VERSION_UKN
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/* PMC Register Configuration */
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# define KINETIS_PMC_HAS_REGSC 1 /* SoC has REGSC Register */
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# undef KINETIS_PMC_HAS_REGSC_ACKISO /* SoC has REGSC[ACKISO] */
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# define KINETIS_PMC_HAS_REGSC_VLPRS 1 /* SoC has REGSC[VLPRS] */
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# undef KINETIS_PMC_HAS_REGSC_VLPO /* SoC has REGSC[VLPO] */
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# undef KINETIS_PMC_HAS_REGSC_REGFPM /* SoC has REGSC[REGFPM] */
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# undef KINETIS_PMC_HAS_REGSC_BGEN /* SoC has REGSC[BGEN] */
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# define KINETIS_PMC_HAS_REGSC_TRAMPO 1 /* SoC has REGSC[TRAMPO] */
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# define KINETIS_PMC_HAS_REGSC_REGONS 1 /* SoC has REGSC[REGONS] */
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#endif
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#if !defined(KINETIS_PMC_VERSION)
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# error "No KINETIS_PMC_VERSION defined!"
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#endif
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#if defined(KINETIS_PMC_HAS_C5_PRDIV)
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# define KINETIS_PMC_C5_PRDIV_MASK ((1 << (KINETIS_PMC_C5_PRDIV_BITS))-1)
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#endif
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#if defined(KINETIS_PMC_HAS_C7_OSCSEL)
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# define KINETIS_PMC_C7_OSCSEL_MASK ((1 << (KINETIS_PMC_C7_OSCSEL_BITS))-1)
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#endif
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#endif /* __ARCH_ARM_INCLUDE_KINETIS_KINETIS_PMC_H */
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