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nuttx/arch/risc-v
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Inochi Amaoto 49b3f52db1 arch/riscv/qemu-rv: replace M-mode init code with SBI in kernel build 
The qemu-rv use a small init code for M mode in kernel build.
It is hard-coding and is difficult to change. Due to the fact,
introduce a already mature SBI implement (e.g OpenSBI) to
replace existing code is a better choice.

This patch introduce some change for qemu-rv:
1. use SSTC to provide time interrupt in kernel build
2. remove uncessary M mode trap.

For simplicity, this patch does not add support for booting
nuttx for any core, but force boot core to start core 0 and
let core 0 do the initialization.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
2024-04-27 22:09:22 -03:00
..
include arch/risc-v: add risc-v SSTC extension support 2024-04-27 22:09:22 -03:00
src arch/riscv/qemu-rv: replace M-mode init code with SBI in kernel build 2024-04-27 22:09:22 -03:00
CMakeLists.txt cmake:init RISC-V cmake qemu-rv build 2023-10-26 21:01:46 +08:00
Kconfig arch/risc-v: add risc-v SSTC extension support 2024-04-27 22:09:22 -03:00