nuttx/arch/risc-v/Kconfig
Masayuki Ishikawa 7a8e9581ca Merged in masayuki2009/nuttx.nuttx/hifive1-qemu (pull request #1078)
HiFive1 with qemu

* arch: risc-v: Add include/.gitignore

* arch: risc-v: Add src/.gitignore

* arch: risc-v: Remove uncommon function prototypes in include/irq.h

* arch: risc-v: Add missing symbols and function prototypes in src/common/up_internal.h

* arch: risc-v: Add src/common/up_modifyreg32.c

* arch: risc-v: Enable include Make.dep in src/Makefile

* arch: risc-v: Fix stack coloration in common/up_createstack.c

* arch: risc-v: Add common/up_puts.c

* arch: risc-v: Add common/up_checkstack.c

* arch: rv32im: Move all logics from up_dumpstate.c to up_assert.c

    This change is same as other architectures like arm/src/armv7-m

* arch: Select ARCH_HAVE_STACKCHECK for RISC-V in Kconfig

* arch: risc-v: Add SiFive fe310 processor

    NOTE: Currently only tested with qemu

* boards: hifive1-revb: Add SiFive hifive1-revb board

    NOTE: Currently only tested with qemu

* tools: Add fe310 processor to configure.sh

Approved-by: Alan Carvalho de Assis <acassis@gmail.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-11-28 20:37:24 +00:00

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#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
if ARCH_RISCV
comment "RISC-V Options"
choice
prompt "RISC-V chip selection"
default ARCH_CHIP_NR5
config ARCH_CHIP_FE310
bool "SiFive FE310"
select ARCH_RV32IM
---help---
SiFive FE310 processor (E31 RISC-V Core with MAC extensions).
config ARCH_CHIP_NR5
bool "NEXT NanoRisc5"
select ARCH_RV32IM
---help---
NEXT RISC-V NR5Mxx architectures (RISC-V RV32IM cores).
config ARCH_CHIP_GAP8
bool "GreenwavesTechnologies GAP8"
select ARCH_RV32IM
---help---
GreenwavesTechnologies GAP8 features a 1+8-core RI5CY DSP-like
processor, which originally comes from the ETH PULP platform.
endchoice
config ARCH_RV32I
bool
default n
config ARCH_RV32IM
bool
default n
config ARCH_FAMILY
string
default "rv32im" if ARCH_RM32IM
config ARCH_CHIP
string
default "fe310" if ARCH_CHIP_FE310
default "nr5m100" if ARCH_CHIP_NR5
default "gap8" if ARCH_CHIP_GAP8
config NR5_MPU
bool "MPU support"
default n
depends on ARCH_HAVE_MPU
select ARCH_USE_MPU
---help---
Build in support for the RISC-V Memory Protection Unit (MPU).
Check your chip specifications first; not all RISC-V architectures
support the MPU.
if ARCH_RV32IM
source arch/risc-v/src/rv32im/Kconfig
endif
if ARCH_CHIP_FE310
source arch/risc-v/src/fe310/Kconfig
endif
if ARCH_CHIP_NR5
source arch/risc-v/src/nr5m100/Kconfig
endif
if ARCH_CHIP_GAP8
source arch/risc-v/src/gap8/Kconfig
endif
endif