Huang Qi 7c93e96908 arch/risc-v: Fix typo in riscv_assert.c ...

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>

2022-01-13 14:53:18 +01:00

..

include

arch/risc-v: Merge rv32im and rv64gc into common

2022-01-11 23:24:33 +08:00

src

arch/risc-v: Fix typo in riscv_assert.c

2022-01-13 14:53:18 +01:00

Kconfig

arch/risc-v: Merge rv32im and rv64gc into common

2022-01-11 23:24:33 +08:00