161104c76a
arch/z80/src/ez80/Toolchain.defs: Correct some CFLAGS when optimization suppressed. arch/z80/src/ez80/Kconfig arch/z80/src/ez80/ez80_emac.c: Remove configuration option for selecting EMAC RAM address. This is duplicated and possibly conflicting. The correct address for the RAM is provided in the linker command file. The RAM should be configured once and using this single definitions. arch/z80/src/ez80/ez80_startup.asm and arch/z80/src/ez80/ez80f9*_init.asm. Move RAM and FLAH intialization out of MCU-specific logic to common start-up logic. We cannot call any functions until SRAM is initialized and the stack is properly initialized because the return address is stored on the stack. Use internal SRAM for the IDLE stack to avoid the chicken'n'egg problem. boards/z80/ez80/z20x/configs/sdboot/sdboot.zdsproj: Discuss build environments.
77 lines
3.2 KiB
Plaintext
77 lines
3.2 KiB
Plaintext
/*****************************************************************************/
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/* boards/z80/ez80/z20x/scripts/z20x_ram.linkcmd */
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/* For configurations running entirely out of RAM with nothing in FLASH */
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/* */
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/* Licensed to the Apache Software Foundation (ASF) under one or more */
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/* contributor license agreements. See the NOTICE file distributed with */
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/* this work for additional information regarding copyright ownership. The */
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/* ASF licenses this file to you under the Apache License, Version 2.0 (the */
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/* "License"); you may not use this file except in compliance with the */
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/* License. You may obtain a copy of the License at */
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/* */
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/* http://www.apache.org/licenses/LICENSE-2.0 */
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/* */
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/* Unless required by applicable law or agreed to in writing, software */
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/* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT */
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/* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the */
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/* License for the specific language governing permissions and limitations */
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/* under the License. */
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/* */
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/*****************************************************************************/
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-FORMAT=OMF695,INTEL32
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-map -maxhexlen=64 -quiet -warnoverlap -xref -unresolved=fatal
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-sort NAME=ascending -warn -debug -NOigcase
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RANGE ROM $000000 : $01FFFF
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RANGE RAM $040000 : $0BFFFF
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RANGE EXTIO $000000 : $00FFFF
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RANGE INTIO $000000 : $0000FF
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CHANGE .RESET is RAM
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CHANGE .STARTUP is RAM
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CHANGE TEXT is CODE
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CHANGE CODE is RAM
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CHANGE STRSECT is CODE
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ORDER .RESET,.IVECTS,.STARTUP,CODE,DATA
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DEFINE __low_romdata = copy base of DATA
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DEFINE __low_data = base of DATA
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DEFINE __len_data = length of DATA
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DEFINE __low_bss = base of BSS
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DEFINE __len_bss = length of BSS
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DEFINE __stack = highaddr of RAM + 1
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DEFINE __heaptop = highaddr of RAM
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DEFINE __heapbot = top of RAM + 1
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DEFINE __low_romcode = copy base of CODE
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DEFINE __low_code = base of CODE
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DEFINE __len_code = length of CODE
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DEFINE __copy_code_to_ram = 0
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DEFINE __crtl = 1
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DEFINE __CS0_LBR_INIT_PARAM = $04
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DEFINE __CS0_UBR_INIT_PARAM = $0b
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DEFINE __CS0_CTL_INIT_PARAM = $08
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DEFINE __CS0_BMC_INIT_PARAM = $00
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DEFINE __CS1_LBR_INIT_PARAM = $00
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DEFINE __CS1_UBR_INIT_PARAM = $00
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DEFINE __CS1_CTL_INIT_PARAM = $00
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DEFINE __CS1_BMC_INIT_PARAM = $00
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DEFINE __CS2_LBR_INIT_PARAM = $00
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DEFINE __CS2_UBR_INIT_PARAM = $00
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DEFINE __CS2_CTL_INIT_PARAM = $00
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DEFINE __CS2_BMC_INIT_PARAM = $00
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DEFINE __CS3_LBR_INIT_PARAM = $00
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DEFINE __CS3_UBR_INIT_PARAM = $00
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DEFINE __CS3_CTL_INIT_PARAM = $00
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DEFINE __CS3_BMC_INIT_PARAM = $00
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DEFINE __RAM_CTL_INIT_PARAM = $80
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DEFINE __RAM_ADDR_U_INIT_PARAM = $AF
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DEFINE __FLASH_CTL_INIT_PARAM = $88
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DEFINE __FLASH_ADDR_U_INIT_PARAM = $00
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define _SYS_CLK_FREQ = 20000000
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/* arch/z80/src/Makefile.zdsii will append target, object and library paths below */
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