155 lines
5.8 KiB
C
155 lines
5.8 KiB
C
/****************************************************************************
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* arch/arm/src/efm32/efm32_pwm.h
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*
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* Copyright (C) 2014 Pierre-Noel Bouteville. All rights reserved.
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* Author: Pierre-Noel Bouteville <pnb990@gmail.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_EFM32_EFM32_PWM_H
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#define __ARCH_ARM_SRC_EFM32_EFM32_PWM_H
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/* The EFM32 does not have dedicated PWM hardware. Rather, pulsed output
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* control is a capability of the EFM32 timers. The logic in this file
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* implements the lower half of the standard, NuttX PWM interface using the
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* EFM32 timers. That interface is described in include/nuttx/drivers/pwm.h.
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*/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include "chip.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Configuration **************************************************************/
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/* Timer devices may be used for different purposes. One special purpose is
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* to generate modulated outputs for such things as motor control.
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* If CONFIG_EFM32_TIMERn is defined then the CONFIG_EFM32_TIMERn_PWM must also
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* be defined to indicate that timer "n" is intended to be used for pulsed
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* output signal generation.
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*/
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#ifndef CONFIG_EFM32_TIMER0
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# undef CONFIG_EFM32_TIMER0_PWM
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#endif
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#ifndef CONFIG_EFM32_TIMER1
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# undef CONFIG_EFM32_TIMER1_PWM
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#endif
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#ifndef CONFIG_EFM32_TIMER2
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# undef CONFIG_EFM32_TIMER2_PWM
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#endif
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#ifndef CONFIG_EFM32_TIMER3
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# undef CONFIG_EFM32_TIMER3_PWM
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#endif
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/* Check if PWM support for any channel is enabled. */
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#if defined(CONFIG_EFM32_TIMER0_PWM) || \
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defined(CONFIG_EFM32_TIMER1_PWM) || \
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defined(CONFIG_EFM32_TIMER2_PWM) || \
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defined(CONFIG_EFM32_TIMER3_PWM)
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#include <arch/board/board.h>
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#include "chip/efm32_timer.h"
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/* For each timer that is enabled for PWM usage, we need the following additional
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* configuration settings:
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*
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* CONFIG_EFM32_TIMERx_CHANNEL - Specifies the timer output channel {0,1,3}
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* BOARD_PWM_TIMERx_PINCFG - Specifies the timer output pin configuration.
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* example : (GPIO_PORTC|GPIO_PIN0|GPIO_OUTPUT_PUSHPULL)
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*
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* BOARD_PWM_TIMERx_PINLOC - Specifies the timer output pin location.
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* example : _TIMER_ROUTE_LOCATION_LOC4
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*
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* BOARD_PWM_TIMERx_CLKIN - Specifies the timer input clock frequency (in Hz).
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* example : 48e6 for 48MHz
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*
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* NOTE: The EFM32 timers are each capable of generating different signals on
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* each of the four channels with different duty cycles. That capability is
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* not supported by this driver: Only one output channel per timer.
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*/
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/************************************************************************************
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* Public Types
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************************************************************************************/
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/************************************************************************************
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* Public Data
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************************************************************************************/
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#ifndef __ASSEMBLY__
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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/************************************************************************************
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* Name: efm32_pwminitialize
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*
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* Description:
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* Initialize one timer for use with the upper_level PWM driver.
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*
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* Input Parameters:
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* timer - A number identifying the timer use. The number of valid timer
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* IDs varies with the EFM32 MCU and MCU family but is somewhere in
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* the range of {0,..,3}.
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*
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* Returned Value:
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* On success, a pointer to the EFM32 lower half PWM driver is returned.
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* NULL is returned on any failure.
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*
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************************************************************************************/
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FAR struct pwm_lowerhalf_s *efm32_pwminitialize(int timer);
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* CONFIG_EFM32_TIMERx_PWM */
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#endif /* __ARCH_ARM_SRC_EFM32_EFM32_PWM_H */
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