94 lines
3.4 KiB
C
94 lines
3.4 KiB
C
/****************************************************************************
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* boards/xtensa/esp32/ttgo_eink5_v2/include/board.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __BOARDS_XTENSA_ESP32_TTGO_EINK_5_V2_INCLUDE_BOARD_H
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#define __BOARDS_XTENSA_ESP32_TTGO_EINK_5_V2_INCLUDE_BOARD_H
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Clocking *****************************************************************/
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/* The ESP32 Core board V2 is fitted with either a 26 a 40MHz crystal */
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#ifdef CONFIG_ESP32_XTAL_26MHz
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# define BOARD_XTAL_FREQUENCY 26000000
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#else
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# define BOARD_XTAL_FREQUENCY 40000000
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#endif
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/* Clock reconfiguration is currently disabled, so the CPU will be running
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* at the XTAL frequency or at two times the XTAL frequency, depending upon
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* how we load the code:
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*
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* - If we load the code into FLASH at address 0x1000 where it is started by
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* the second level bootloader, then the frequency is the crystal
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* frequency.
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* - If we load the code into IRAM after the second level bootloader has run
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* this frequency will be twice the crystal frequency.
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*
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* Don't ask me for an explanation.
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*/
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/* Note: The bootloader (esp-idf bootloader.bin) configures:
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*
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* - CPU frequency to 80MHz
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* - The XTAL frequency according to the SDK config CONFIG_ESP32_XTAL_FREQ,
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* which is 40MHz by default.
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*
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* Reference:
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* https://github.com/espressif/esp-idf/blob
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* /6fd855ab8d00d23bad4660216bc2122c2285d5be/components
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* /bootloader_support/src/bootloader_clock.c#L38-L62
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*/
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#ifdef CONFIG_ESP32_RUN_IRAM
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# define BOARD_CLOCK_FREQUENCY (2 * BOARD_XTAL_FREQUENCY)
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#else
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#ifdef CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ
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# define BOARD_CLOCK_FREQUENCY (CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ * 1000000)
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#else
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# define BOARD_CLOCK_FREQUENCY 80000000
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#endif
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#endif
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/* LED definitions **********************************************************/
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/* Define how many LEDs this board has (needed by userleds) */
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#define BOARD_NLEDS 1
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/* GPIO pins used by the GPIO Subsystem */
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#define BOARD_NGPIOOUT 1 /* Amount of GPIO Output pins */
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#define BOARD_NGPIOIN 1 /* Amount of GPIO Input without Interruption */
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#define BOARD_NGPIOINT 1 /* Amount of GPIO Input w/ Interruption pins */
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/* E-INK SSD1680 */
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#define DISPLAY_DC 19
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#define DISPLAY_RST 12
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#define DISPLAY_BUSY 4
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#define DISPLAY_CS 5
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#define DISPLAY_SPI_BUS 3
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#endif /* __BOARDS_XTENSA_ESP32_TTGO_EINK_5_V2_INCLUDE_BOARD_H */
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