154 lines
5.4 KiB
Plaintext
154 lines
5.4 KiB
Plaintext
/****************************************************************************
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* boards/arm/lpc43xx/lpc4337-ws/scripts/flashconfig.ld
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*
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* Copyright (C) 2016 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/*
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* Power-Up Reset Overview
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* -----------------------
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*
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* The ARM core starts executing code on reset with the program counter set
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* to 0x0000 0000. The LPC43xx contains a shadow pointer register that
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* allows areas of memory to be mapped to address 0x0000 0000. The default,
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* reset value of the shadow pointer is 0x1040 0000 so that on reset code in
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* the boot ROM is always executed first.
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*
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* The boot starts after reset is released. The IRC is selected as CPU clock
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* and the Cortex-M4 starts the boot loader. By default the JTAG access to the
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* chip is disabled at reset. The boot ROM determines the boot mode based on
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* the OTP BOOT_SRC value or reset state pins. For flash-based parts, the part
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* boots from internal flash by default. Otherwise, the boot ROM copies the
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* image to internal SRAM at location 0x1000 0000, sets the ARM's shadow
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* pointer to 0x1000 0000, and jumps to that location.
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*
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* However, using JTAG the executable image can be also loaded directly into
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* and executed from SRAM.
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*/
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/* The LPC4357 on the LPC4357-EVB has the following memory resources:
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*
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* SRAM:
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* a. 32kB of SRAM mapped at 0x10000000
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* b. 40kB of SRAM mapped at 0x10080000
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* Internal flash:
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* a. 512kB of flash (bank A) at 0x1a000000
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* b. 512kB of flash (bank B) at 0x1b000000
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* External flash:
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* a. 4MB of SPIFl flash at 0x14000000
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*
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* Here we assume that:
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*
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* 1. We will be running out of SRAM at 0x1000:0000, and
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* 2. All .data and .bss will all fit into the 72KB SRAM block.
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*
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* NOTE: That initialized data is kept in the program memory SRAM and copied
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* to .data SRAM. This is wasteful and unnecessary but provides a good test
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* for future, FLASH-resident code.
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*/
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MEMORY
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{
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progmem (rx) : ORIGIN = 0x1A000000, LENGTH = 512K
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datamem (rwx) : ORIGIN = 0x10000000, LENGTH = 32K
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}
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OUTPUT_ARCH(arm)
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ENTRY(__start) /* Treat __start as the anchor for dead code stripping */
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EXTERN(_vectors) /* Force the vectors to be included in the output */
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SECTIONS
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{
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.text : {
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_stext = ABSOLUTE(.);
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*(.vectors)
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*(.text .text.*)
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*(.fixup)
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*(.gnu.warning)
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*(.rodata .rodata.*)
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*(.gnu.linkonce.t.*)
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*(.glue_7)
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*(.glue_7t)
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*(.got)
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*(.gcc_except_table)
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*(.gnu.linkonce.r.*)
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_etext = ABSOLUTE(.);
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} > progmem
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.init_section : {
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_sinit = ABSOLUTE(.);
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*(.init_array .init_array.*)
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_einit = ABSOLUTE(.);
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} > progmem
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.ARM.extab : {
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*(.ARM.extab*)
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} > progmem
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__exidx_start = ABSOLUTE(.);
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.ARM.exidx : {
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*(.ARM.exidx*)
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} > progmem
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__exidx_end = ABSOLUTE(.);
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_eronly = ABSOLUTE(.);
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.data : {
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_sdata = ABSOLUTE(.);
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*(.data .data.*)
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*(.gnu.linkonce.d.*)
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CONSTRUCTORS
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. = ALIGN(4);
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_edata = ABSOLUTE(.);
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} > datamem AT > progmem
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.bss : { /* BSS */
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_sbss = ABSOLUTE(.);
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*(.bss .bss.*)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = ABSOLUTE(.);
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} > datamem
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_info 0 : { *(.debug_info) }
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.debug_line 0 : { *(.debug_line) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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.debug_aranges 0 : { *(.debug_aranges) }
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}
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