Anthony Merlino 7eaa47072f Merged in antmerlino/nuttx/stm32f7-usart1-dma (pull request #972) ...

stm32f7: USART1_RXDMA is dependent on STM32F7_DMA2 not STM32F7_DMA1

Approved-by: David Sidrane <david.sidrane@nscdg.com>
Approved-by: Alan Carvalho de Assis <acassis@gmail.com>
Approved-by: Gregory Nutt <gnutt@nuttx.org>

2019-08-09 18:24:13 +00:00

..

include

This commit removes CONFIG_ARCH_INT_DISABLEALL. In the normal course of things, interrupts must occasionally be disabled using the up_irq_save() inline function to prevent contention in use of resources that may be shared between interrupt level and non-interrupt level logic. Now the question arises, if we are using BASEPRI to disable interrupts and have high priority interrupts enabled (CONFIG_ARCH_HIPRI_INTERRUPT=y), do we disable all interrupts except SVCall (we cannot disable SVCall interrupts). Or do we only disable the "normal" interrupts?

2019-08-09 10:52:35 -06:00

src

Merged in antmerlino/nuttx/stm32f7-usart1-dma (pull request #972)

2019-08-09 18:24:13 +00:00

Kconfig

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