5ce9b01b54
* boards/risc-v: Remove unnecessary section descriptions from ld-qemu.script These section descriptions are for ARM and not needed for RISC-V.
116 lines
3.8 KiB
Plaintext
116 lines
3.8 KiB
Plaintext
/****************************************************************************
|
|
* boards/risc-v/k210/maix-bit/scripts/ld.script
|
|
*
|
|
* Copyright (C) 2019 Masayuki Ishikawa. All rights reserved.
|
|
* Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
|
|
*
|
|
* Redistribution and use in source and binary forms, with or without
|
|
* modification, are permitted provided that the following conditions
|
|
* are met:
|
|
*
|
|
* 1. Redistributions of source code must retain the above copyright
|
|
* notice, this list of conditions and the following disclaimer.
|
|
* 2. Redistributions in binary form must reproduce the above copyright
|
|
* notice, this list of conditions and the following disclaimer in
|
|
* the documentation and/or other materials provided with the
|
|
* distribution.
|
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
|
* used to endorse or promote products derived from this software
|
|
* without specific prior written permission.
|
|
*
|
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
* POSSIBILITY OF SUCH DAMAGE.
|
|
*
|
|
****************************************************************************/
|
|
|
|
/* Reg Access Start addr End addr Size
|
|
* MEM0 CPU w/ cache 0x80000000 - 0x803fffff : 4MB
|
|
* MEM1 CPU w/ cache 0x80400000 - 0x805fffff : 2MB
|
|
* MEM0 CPU w/o cache 0x40000000 - 0x403fffff : 4MB
|
|
* MEM1 CPU w/o cache 0x40400000 - 0x405fffff : 4MB
|
|
*/
|
|
|
|
MEMORY
|
|
{
|
|
progmem (rx) : ORIGIN = 0x80000000, LENGTH = 4096K /* w/ cache */
|
|
sram (rwx) : ORIGIN = 0x80400000, LENGTH = 2048K /* w/ cache */
|
|
}
|
|
|
|
OUTPUT_ARCH("riscv")
|
|
|
|
ENTRY(_stext)
|
|
EXTERN(_vectors)
|
|
SECTIONS
|
|
{
|
|
.text : {
|
|
_stext = ABSOLUTE(.);
|
|
*(.vectors)
|
|
*(.text .text.*)
|
|
*(.fixup)
|
|
*(.gnu.warning)
|
|
*(.rodata .rodata.* .srodata .srodata.*)
|
|
*(.gnu.linkonce.t.*)
|
|
*(.glue_7)
|
|
*(.glue_7t)
|
|
*(.got)
|
|
*(.gcc_except_table)
|
|
*(.gnu.linkonce.r.*)
|
|
_etext = ABSOLUTE(.);
|
|
} > progmem
|
|
|
|
.init_section : ALIGN(4) {
|
|
_sinit = ABSOLUTE(.);
|
|
KEEP(*(.init_array .init_array.*))
|
|
_einit = ABSOLUTE(.);
|
|
} > progmem
|
|
|
|
_eronly = ABSOLUTE(.);
|
|
|
|
.data : ALIGN(4) {
|
|
_sdata = ABSOLUTE(.);
|
|
*(.data .data.*)
|
|
*(.sdata .sdata.* .sdata2.*)
|
|
*(.gnu.linkonce.d.*)
|
|
*(.gnu.linkonce.s.*)
|
|
CONSTRUCTORS
|
|
. = ALIGN(4);
|
|
_edata = ABSOLUTE(.);
|
|
} > sram AT > progmem
|
|
|
|
.bss : ALIGN(4) {
|
|
_sbss = ABSOLUTE(.);
|
|
*(.bss .bss.*)
|
|
*(.sbss .sbss.*)
|
|
*(.gnu.linkonce.b.*)
|
|
*(.gnu.linkonce.sb.*)
|
|
*(COMMON)
|
|
. = ALIGN(4);
|
|
_ebss = ABSOLUTE(.);
|
|
} > sram
|
|
|
|
/* Stabs debugging sections. */
|
|
|
|
.stab 0 : { *(.stab) }
|
|
.stabstr 0 : { *(.stabstr) }
|
|
.stab.excl 0 : { *(.stab.excl) }
|
|
.stab.exclstr 0 : { *(.stab.exclstr) }
|
|
.stab.index 0 : { *(.stab.index) }
|
|
.stab.indexstr 0 : { *(.stab.indexstr) }
|
|
.comment 0 : { *(.comment) }
|
|
.debug_abbrev 0 : { *(.debug_abbrev) }
|
|
.debug_info 0 : { *(.debug_info) }
|
|
.debug_line 0 : { *(.debug_line) }
|
|
.debug_pubnames 0 : { *(.debug_pubnames) }
|
|
.debug_aranges 0 : { *(.debug_aranges) }
|
|
}
|