037c9ea0a4
Summary The naming standard at https://cwiki.apache.org/confluence/display/NUTTX/Naming+FAQ requires that all MCU-private files begin with the name of the architecture, not up_. This PR addresses only these name changes for the up_*.h files. There are only three, but almost 1680 files that include them: up_arch.h up_internal.h up_vfork.h The only change to the files is from including up_arch.h to arm_arch.h (for example). The entire job required to be compatible with that Naming Convention will also require changing the naming of the up_() functions that are used only within arch/arm and board/arm. Impact There should be not impact of this change (other that one step toward more consistent naming). Testing stm32f4discovery:netnsh
197 lines
6.6 KiB
C
197 lines
6.6 KiB
C
/****************************************************************************
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* arch/arm/src/stm32f0l0g0/stm32_hsi48.c
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*
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* Copyright (C) 2017 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include "arm_arch.h"
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#include "chip.h"
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#include "hardware/stm32_rcc.h"
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#include "hardware/stm32_crs.h"
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#include "stm32_hsi48.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#if defined(CONFIG_ARCH_CHIP_STM32F0)
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# define STM32_HSI48_REG STM32_RCC_CR2
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# define STM32_HSI48ON RCC_CR2_HSI48ON
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# define STM32_HSI48RDY RCC_CR2_HSI48RDY
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#elif defined(CONFIG_ARCH_CHIP_STM32L0)
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# define STM32_HSI48_REG STM32_RCC_CRRCR
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# define STM32_HSI48ON RCC_CRRCR_HSI48ON
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# define STM32_HSI48RDY RCC_CRRCR_HSI48RDY
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#else
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# error "Unsupported STM32F0/L0 HSI48"
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#endif
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: stm32_enable_hsi48
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*
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* Description:
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* On STM32F04x, STM32F07x and STM32F09x devices only, the HSI48 clock
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* signal is generated from an internal 48 MHz RC oscillator and can be
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* used directly as a system clock or divided and be used as PLL input.
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*
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* The internal 48MHz RC oscillator is mainly dedicated to provide a high
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* precision clock to the USB peripheral by means of a special Clock
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* Recovery System (CRS) circuitry, which could use the USB SOF signal or
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* the LSE or an external signal to automatically adjust the oscillator
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* frequency on-fly, in a very small steps. This oscillator can also be
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* used as a system clock source when the system is in run mode; it will
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* be disabled as soon as the system enters in Stop or Standby mode. When
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* the CRS is not used, the HSI48 RC oscillator runs on its default
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* frequency which is subject to manufacturing process variations.
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*
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* Input Parameters:
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* Identifies the syncrhonization source for the HSI48. When used as the
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* USB source clock, this must be set to SYNCSRC_USB.
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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void stm32_enable_hsi48(enum syncsrc_e syncsrc)
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{
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uint32_t regval;
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/* Enable the HSI48 clock.
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*
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* The HSI48 RC can be switched on and off using the HSI48ON bit in the
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* Clock control register (RCC_CR).
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*
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* The USB clock may be derived from either the PLL clock or from the
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* HSI48 clock. This oscillator will be also automatically enabled (by
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* hardware forcing HSI48ON bit to one) as soon as it is chosen as a clock
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* source for the USB and the peripheral is
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* enabled.
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*/
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regval = getreg32(STM32_HSI48_REG);
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regval |= STM32_HSI48ON;
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putreg32(regval, STM32_HSI48_REG);
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/* Wait for the HSI48 clock to stabilize */
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while ((getreg32(STM32_HSI48_REG) & STM32_HSI48RDY) == 0);
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/* Return if no synchronization */
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if (syncsrc == SYNCSRC_NONE)
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{
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return;
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}
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/* The CRS synchronization (SYNC) source, selectable through the CRS_CFGR
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* register, can be the signal from the external CRS_SYNC pin, the LSE
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* clock or the USB SOF signal.
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*/
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regval = getreg32(STM32_CRS_CFGR);
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regval &= ~CRS_CFGR_SYNCSRC_MASK;
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switch (syncsrc)
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{
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default:
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case SYNCSRC_GPIO: /* GPIO selected as SYNC signal source */
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regval |= CRS_CFGR_SYNCSRC_GPIO;
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break;
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case SYNCSRC_LSE: /* LSE selected as SYNC signal source */
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regval |= CRS_CFGR_SYNCSRC_LSE;
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break;
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case SYNCSRC_USB: /* USB SOF selected as SYNC signal source */
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regval |= CRS_CFGR_SYNCSRC_USBSOF;
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break;
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}
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putreg32(regval, STM32_CRS_CFGR);
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/* Set the AUTOTRIMEN bit the CRS_CR register to enables the automatic
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* hardware adjustment of TRIM bits according to the measured frequency
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* error between the selected SYNC event.
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*/
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regval = getreg32(STM32_CRS_CR);
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regval |= CRS_CR_AUTOTRIMEN;
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putreg32(regval, STM32_CRS_CR);
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}
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/****************************************************************************
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* Name: stm32_disable_hsi48
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*
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* Description:
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* Disable the HSI48 clock.
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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void stm32_disable_hsi48(void)
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{
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uint32_t regval;
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/* Disable the HSI48 clock */
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regval = getreg32(STM32_HSI48_REG);
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regval &= ~STM32_HSI48ON;
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putreg32(regval, STM32_HSI48_REG);
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/* Set other registers to the default settings. */
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regval = getreg32(STM32_CRS_CFGR);
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regval &= ~CRS_CFGR_SYNCSRC_MASK;
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putreg32(regval, STM32_CRS_CFGR);
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regval = getreg32(STM32_CRS_CR);
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regval &= ~CRS_CR_AUTOTRIMEN;
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putreg32(regval, STM32_CRS_CR);
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}
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