288b57d5ca
This patch implements working support for EXTI GPIO. Signed-off-by: Michał Łyszczek <michal.lyszczek@bofc.pl> -- v1 -> v2: Suggested by: Petro Karashchenko - change (1 << n) to (1 << (n)) in macro definition - change 1 << X to (1 << X) in code - fix alignment v2 -> v3: Suggested by: Petro Karashchenko - I was supposed to change (1 << pin) to 1 << pin, not the other way around:)
374 lines
9.3 KiB
C
374 lines
9.3 KiB
C
/****************************************************************************
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* arch/arm/src/stm32wl5/stm32wl5_exti_gpio.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <nuttx/irq.h>
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#include <nuttx/arch.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <errno.h>
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#include <debug.h>
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#include <arch/irq.h>
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#include "arm_internal.h"
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#include "chip.h"
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#include "stm32wl5_gpio.h"
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#include "stm32wl5_exti.h"
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/****************************************************************************
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* Private Types
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****************************************************************************/
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struct gpio_callback_s
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{
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xcpt_t callback; /* Callback entry point */
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void *arg; /* The argument that accompanies the callback */
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};
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/* Interrupt handlers attached to each EXTI */
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static struct gpio_callback_s g_gpio_handlers[16];
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Interrupt Service Routines - Dispatchers
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****************************************************************************/
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static int stm32wl5_exti0_isr(int irq, void *context, void *arg)
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{
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int ret = OK;
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/* Clear the pending interrupt */
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putreg32(0x0001, STM32WL5_EXTI_PR1);
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/* And dispatch the interrupt to the handler */
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if (g_gpio_handlers[0].callback != NULL)
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{
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xcpt_t callback = g_gpio_handlers[0].callback;
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void *cbarg = g_gpio_handlers[0].arg;
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ret = callback(irq, context, cbarg);
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}
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return ret;
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}
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static int stm32wl5_exti1_isr(int irq, void *context, void *arg)
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{
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int ret = OK;
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/* Clear the pending interrupt */
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putreg32(0x0002, STM32WL5_EXTI_PR1);
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/* And dispatch the interrupt to the handler */
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if (g_gpio_handlers[1].callback != NULL)
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{
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xcpt_t callback = g_gpio_handlers[1].callback;
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void *cbarg = g_gpio_handlers[1].arg;
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ret = callback(irq, context, cbarg);
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}
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return ret;
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}
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static int stm32wl5_exti2_isr(int irq, void *context, void *arg)
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{
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int ret = OK;
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/* Clear the pending interrupt */
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putreg32(0x0004, STM32WL5_EXTI_PR1);
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/* And dispatch the interrupt to the handler */
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if (g_gpio_handlers[2].callback != NULL)
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{
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xcpt_t callback = g_gpio_handlers[2].callback;
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void *cbarg = g_gpio_handlers[2].arg;
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ret = callback(irq, context, cbarg);
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}
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return ret;
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}
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static int stm32wl5_exti3_isr(int irq, void *context, void *arg)
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{
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int ret = OK;
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/* Clear the pending interrupt */
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putreg32(0x0008, STM32WL5_EXTI_PR1);
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/* And dispatch the interrupt to the handler */
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if (g_gpio_handlers[3].callback != NULL)
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{
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xcpt_t callback = g_gpio_handlers[3].callback;
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void *cbarg = g_gpio_handlers[3].arg;
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ret = callback(irq, context, cbarg);
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}
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return ret;
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}
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static int stm32wl5_exti4_isr(int irq, void *context, void *arg)
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{
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int ret = OK;
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/* Clear the pending interrupt */
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putreg32(0x0010, STM32WL5_EXTI_PR1);
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/* And dispatch the interrupt to the handler */
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if (g_gpio_handlers[4].callback != NULL)
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{
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xcpt_t callback = g_gpio_handlers[4].callback;
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void *cbarg = g_gpio_handlers[4].arg;
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ret = callback(irq, context, cbarg);
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}
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return ret;
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}
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static int stm32wl5_exti_multiisr(int irq, void *context, void *arg,
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int first, int last)
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{
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uint32_t pr;
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int pin;
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int ret = OK;
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/* Examine the state of each pin in the group */
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pr = getreg32(STM32WL5_EXTI_PR1);
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/* And dispatch the interrupt to the handler */
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for (pin = first; pin <= last; pin++)
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{
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/* Is an interrupt pending on this pin? */
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uint32_t mask = 1 << pin;
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if ((pr & mask) != 0)
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{
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/* Clear the pending interrupt */
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putreg32(mask, STM32WL5_EXTI_PR1);
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/* And dispatch the interrupt to the handler */
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if (g_gpio_handlers[pin].callback != NULL)
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{
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xcpt_t callback = g_gpio_handlers[pin].callback;
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void *cbarg = g_gpio_handlers[pin].arg;
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int tmp;
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tmp = callback(irq, context, cbarg);
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if (tmp < 0)
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{
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ret = tmp;
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}
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}
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}
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}
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return ret;
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}
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static int stm32wl5_exti95_isr(int irq, void *context, void *arg)
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{
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return stm32wl5_exti_multiisr(irq, context, arg, 5, 9);
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}
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static int stm32wl5_exti1510_isr(int irq, void *context, void *arg)
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{
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return stm32wl5_exti_multiisr(irq, context, arg, 10, 15);
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: stm32wl5_gpiosetevent
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*
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* Description:
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* Sets/clears GPIO based event and interrupt triggers.
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*
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* Description:
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* Sets/clears GPIO based event and interrupt triggers.
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*
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* Input Parameters:
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* pinset - GPIO pin configuration
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* risingedge - Enables interrupt on rising edges
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* fallingedge - Enables interrupt on falling edges
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* event - Generate event when set
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* func - When non-NULL, generate interrupt
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* arg - Argument passed to the interrupt callback
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*
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* Returned Value:
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* Zero (OK) is returned on success, otherwise a negated errno value is
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* returned to indicate the nature of the failure.
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*
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****************************************************************************/
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int stm32wl5_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
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bool event, xcpt_t func, void *arg)
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{
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struct gpio_callback_s *shared_cbs;
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uint32_t pin = pinset & GPIO_PIN_MASK;
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uint32_t exti = 1 << pin;
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int irq;
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xcpt_t handler;
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int nshared;
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int i;
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/* Select the interrupt handler for this EXTI pin */
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if (pin < 5)
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{
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irq = pin + STM32WL5_IRQ_EXTI0;
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nshared = 1;
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shared_cbs = &g_gpio_handlers[pin];
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switch (pin)
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{
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case 0:
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handler = stm32wl5_exti0_isr;
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break;
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case 1:
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handler = stm32wl5_exti1_isr;
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break;
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case 2:
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handler = stm32wl5_exti2_isr;
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break;
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case 3:
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handler = stm32wl5_exti3_isr;
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break;
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default:
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handler = stm32wl5_exti4_isr;
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break;
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}
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}
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else if (pin < 10)
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{
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irq = STM32WL5_IRQ_EXTI95;
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handler = stm32wl5_exti95_isr;
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shared_cbs = &g_gpio_handlers[5];
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nshared = 5;
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}
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else
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{
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irq = STM32WL5_IRQ_EXTI1510;
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handler = stm32wl5_exti1510_isr;
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shared_cbs = &g_gpio_handlers[10];
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nshared = 6;
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}
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/* Get the previous GPIO IRQ handler; Save the new IRQ handler. */
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g_gpio_handlers[pin].callback = func;
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g_gpio_handlers[pin].arg = arg;
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/* Install external interrupt handlers */
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if (func)
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{
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irq_attach(irq, handler, NULL);
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up_enable_irq(irq);
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}
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else
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{
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/* Only disable IRQ if shared handler does not have any active
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* callbacks.
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*/
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for (i = 0; i < nshared; i++)
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{
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if (shared_cbs[i].callback != NULL)
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{
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break;
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}
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}
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if (i == nshared)
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{
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up_disable_irq(irq);
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}
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}
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/* Configure GPIO, enable EXTI line enabled if event or interrupt is
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* enabled.
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*/
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if (event || func)
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{
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pinset |= GPIO_EXTI;
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}
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stm32wl5_configgpio(pinset);
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/* Configure rising/falling edges */
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modifyreg32(STM32WL5_EXTI_RTSR1,
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risingedge ? 0 : exti,
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risingedge ? exti : 0);
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modifyreg32(STM32WL5_EXTI_FTSR1,
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fallingedge ? 0 : exti,
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fallingedge ? exti : 0);
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/* Enable Events and Interrupts */
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modifyreg32(STM32WL5_EXTI_C1EMR1,
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event ? 0 : exti,
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event ? exti : 0);
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modifyreg32(STM32WL5_EXTI_C1IMR1,
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func ? 0 : exti,
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func ? exti : 0);
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/* Return the old IRQ handler */
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return OK;
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}
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